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The DesignWare® Enterprise 40G Ethernet Physical Coding Sublayer (PCS) Controller IP is compliant with the IEEE 802.3 specifications for 1G, 10G, and 40G Ethernet PCS layers. The DesignWare Enterprise 40G Ethernet PCS Controller IP provides an interface between the Media Access Control (MAC) and Physical Medium Attachment Sublayer (PMA) through a media independent interface supporting GMII for 1G, XGMII for 10G and XLGMII for 40G. To maintain transition density and DC balancing, 1000BASE-X and 10GBASE-X PCS use 8B/10B encoding/decoding and 10GBASE-R and 40GBASE-R PCS use 64B/66B encoding or decoding and scrambling techniques.
The DesignWare Enterprise 40G PCS is designed to support the following derivatives of the PCS layer:
- 10GBASE-X PCS
- 10GBASE-R PCS
- 40GBASE-R PCS
- 20GBASE-R PCS
- 1000BASE-X and SGMII with Clause 37 auto-negotiation support
- 40G, 10G or 1G PCS with Backplane Ethernet with auto-negotiation support
The DesignWare Enterprise 40G Ethernet PCS Controller IP is verified using state-of-the-art methodologies including the RTL design, verification, hardware verification, and interoperability tests. It can be easily configured with a user-friendly application interface for easy functional and implementation objectives to meet design requirements, making the DesignWare Enterprise 40G PCS Controller IP a streamlined and flexible solution for 1G/10G/40G Ethernet designs. Coupled with the configurable DesignWare Enterprise 40G Ethernet MAC that supports 1G, 2.5G, 10G, and 40G Ethernet applications offers easy SoC integration for 1G/10G/40G Ethernet designs.  DesignWare Enterprise 40G Ethernet PCS Controller IP
- Compliant with IEEE 802.3 and IEEE 802.1 specifications
- Supports IEEE 802.3az-2010 Energy Efficient Ethernet
- Compliant to IEEE 802.3ba-2010 for 40G Ethernet
- Multiple backplane Ethernet PCS configurations supported
- Configurable management interface
- 40G operations with an XLGMII Interface and 128-bit system interface
- 10G operation with an XGMII interface and 64-bit system interface
- 1G operation with a GMII interface and 32-bit system interface
- Configurable lane control support for 40G modes (KR4 and 40GBASE-R PCS)
- Configurable lane control support for 10G modes (XGXS PCS, KX4, and 10GBASE-X PCS)
- Configurable management interface
- Scrambled idle test pattern generator and checker for 40GBASE-R
- Clock rate compensation of 200ppm (+/- 100 ppm) on the receive MAC interface
- Configurable monitoring, testing, and debugging features
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