ASIP Designer Seminar, Korea

Friday, January 19th, 2018
1:30 pm - 5:00 pm
Korea Semiconductor Association, Room 9F
KSIA Bldg., 182 Pangyoyeok-ro, Bundang-gu, Gyeonggi-do, Korea


Modern SoCs have to perform functions such as signal processing, filtering, packet processing, acceleration, and offload, within strict power and performance parameters of the end application. Application-specific instruction set processors (ASIPs) are an ideal solution when standard processor IP cannot meet challenging application-specific requirements, and fixed hardware is not flexible enough.

Join us at Synopsys' ASIP Designer seminar to learn what types of design problems ASIPs can address and to do a deep dive into the technology, including design methodology, use-models, design modeling, and tool capabilities.

If you are a design engineer, algorithm developer, software engineer, system architect, or design manager focusing on advanced SoCs requiring application-specific optimizations, you won’t want to miss this event.


Agenda at a Glance

Time Topic
1:30pm–1:40pm Welcome
Jun Park, Synopsys Korea
1:40pm–2:20pm Introduction to ASIPs
- Motivation: Why leading IC and system houses design specialized processors
- ASIP examples from typical application domains including artificial intelligence, embedded vision, cloud computing, wireless modems
Gert Goossens, Sr. Director, R&D, Synopsys Belgium
2:20pm–3:00pm Introduction to ASIP Designer and the ASIP Development Process
Markus Willems, Sr. Manager, Synopsys Germany
3:00pm–3:15pm Break
3:15pm–4:00pm VLIW Processor Design using ASIP Designer – A User’s Perspective
Prof. Dr. Won Won Ro, Yonsei University
4:00pm–4:50pm Cryptography Case Study and ASIP Designer Demonstration
Gert Goossens, Sr. Director, R&D, Synopsys Belgium
4:50pm–5:00pm Closing Remarks
Jun Park, Synopsys Korea