Synopsys ARC Secure Option

The Synopsys ARC® Secure option enables the encrypted-pipeline feature of the ARC 600 Family of processor cores, allowing the processors to run encrypted code by fetching encrypted instructions and decrypting them on-the-fly when needed. The feature enables instruction data to remain encrypted in on-chip or off-chip memory, thereby keeping it secure even if memory security is compromised. This makes it significantly more difficult for an attacker to understand the nature of processor activities by snooping on its state or its state changes.

With ARC Secure, the SoC supplier can implement their own select encryption and decryption algorithms, which enables them to encrypt applications before loading them into memory. While this capability can be delivered through “brute force” with large and expensive co-processors or with a dedicated engine, with ARC Secure it is enabled with a marginal (as little as 2%) area, power and performance impact.

Synopsys ARC Secure Extension Datasheet
White Paper: Obfuscating Attacks on Secure SoCs through Encrypted Code Execution