DesignWare Videos

Test & Repair Requirements for Autonomous Vehicles

Learn how advanced automotive semiconductors are being driven by ADAS & autonomous driving systems to move to smaller nodes.The presentation covers test & repair req's and solutions to help ensure automotive functional safety.

Joachim Kunkel, General Manager of the Solutions Group, Synopsys

Featured USB Video: World’s First USB 3.2 Demonstration

Join Eric Huang and Gervais Fong as they demonstrate the world’s first USB 3.2 host and device IP communicating at USB 3.2 speeds over a standard USB Type-C cable. Learn more about how Synopsys DesignWare USB IP can help bring your products to market.

Gervais Fong, USB Product Marketing Manager, Synopsys; Eric Huang USB Product Manager, Synopsys

Featured Bluetooth Video: Accelerating SW Development & IP Evaluation with DesignWare Bluetooth IP

Easily integrate Bluetooth 5 & Bluetooth Mesh capabilities into IoT SoCs, and get a jump start on designing with industry-proven open source software. The demo features a complete solution including DesignWare Bluetooth LE PHY & Link Layer IP and ARC EM Processor.   

Ron Lowman, Marketing Manager, Synopsys

Featured EV Video: Addressing Automotive Safety with ASIL D Ready Vision Processors

Learn about the new ASIL D Ready DesignWare EV6x Embedded Vision Processor IP with Safety Enhancement Package (SEP) for AI-enabled automotive SoCs. 

Gordon Cooper, Product Marketing Manager, Synopsys; Fergus Casey, Director, Processor IP R&D and Safety Manager, Synopsys 


IP for Machine Learning Applications

The state of the art machine learning SoC performing facial recognition, natural language processing and social network filtering functions is causing innovations in IP, memory, semiconductor technology and packaging. Watch this video to learn about such innovations and machine learning SoCs’ unique design requirements. 

Navraj Nandra, Sr. Director of Marketing, Synopsys

Sensor Connectivity with MIPI I3C

This video highlights the advantages of MIPI I3C for system-level sensor connectivity in mobile, automotive and IoT applications. A simple two-wire interface, I3C supports speeds up to 33 megabits per second and shares a 2-wire bus with multiple sensors. Synopsys DesignWare MIPI I3C IP supports the latest I3C specification and offers a complete solution for sensor connectivity. 


55-nm IoT Platform

This demo features an ASIC platform that increases performance, lowers power & reduces system cost for IoT apps. It shows apps such as voice, facial and gesture recognitions, and 9D sensor fusion. A collaboration between Synopsys, Brite and SMIC, the platform leverages Synopsys’ ARC Data Fusion IP Subsystem & Brite’s test chip in SMIC’s 55ULP.

Ron Lowman, Strategic Marketing Manager, Synopsys

Featured PCIe Video: RAS & Debug Capabilities with IP for PCI Express 4.0

This video features Synopsys’ DesignWare® Root Port and Endpoint Controllers for PCIe 4.0 @ 16GT/s, utilizing DesignWare IP Prototyping Kits. See advanced capabilities including reliability, availability and serviceability (RAS) along with debug, error injection and statistical monitoring. 

Paul Cassidy, R&D Manager, Synopsys

Under The Hood: What It Takes To Meet Automotive Compliance

This presentation provides insights into the technical specifications and design decisions for developing automotive grade IP, which helps accelerate compliance of automotive systems and ensures products meet automotive standards such as ISO 26262 functional safety, AEC-Q100 reliability testing and TS 16949 quality management.

Navraj Nandra, Sr. Director of Marketing, Synopsys


Training DIMMs to 3200 Mbps with DesignWare DDR4/3 PHY IP

See how the Synopsys DDR4/3 PHY IP can program and train a wide variety of UDIMMs, RDIMMs, LRDIMMs and 3DS-DIMMs with excellent signal integrity. You’ll also see the results from a shared AC system and when reflection is introduced to the system. 

Marc Greenberg, Director of Product Marketing, Synopsys Brett Murdock, Solutions Architect, Synopsys

Secure Your IoT Device with Ultra-Low Power ARC Processors

Learn how DesignWare ARC Processors help secure your IoT design without an extra security core, keeping area and power consumption to a minimum.


Designing 7-nm IP, Bring It On Moore!

In keeping with Moore’s Law, discover how Synopsys is developing 10nm/7nm IP for SoC designs. Learn how tradeoffs are made in electrostatics, leakage, pattern, manufacturability and transistor performance to meet PPA req's. See how quantum effects impact FinFET designs in terms of fin width & height and anything that impacts bandgap. Technology can be scaled to 7nm, bringing performance & power improvements.

Navraj Nandra, Sr. Director of Marketing, Synopsys

What is ASIP Designer?

See how Synopsys’ ASIP Designer tool suite uses a single input specification to generate an SDK featuring a highly optimizing C compiler, instruction-set simulator, assembler, linker & debugger, and synthesizable RTL. The architectural exploration capability and the ability to make rapid changes in the processor model make it easy to optimize the processor for your requirements. 

Bo Wu, Technical Marketing Manager and Steve Cox, Sr. Manager, Business Development, Synopsys

Synopsys Accelerates IoT Designs with Comprehensive IP Portfolio

John Blyler, editorial director for IoT Embedded Systems talks to Ron Lowman about how Synopsys has re-architected and optimized its comprehensive IP portfolio to address connectivity, security, energy-efficiency and sensor processing requirements of IoT designs.

John Blyler, Editorial Director, IoT Embedded Systems Ron Lowman, Strategic Marketing Manager for IoT, Synopsys

Energy Harvesting, Sensors & SoCs for the IoT Era

Today’s IoT devices require components to be autonomous and have life-long renewable sources of energy. This session describes the IoT market trends, SoC components required for the IoT such as sensors and implantable devices, and energy harvesting methods. 

Jamil Kawa, Scientist, Synopsys

Physical IP Development on FinFET - There's Nothing Planar About It!

This video discusses the FinFET characteristics of physical IP design and how they differ from planar devices. It will describe the impact FinFETs have on existing circuit designs and layout topologies for widely used IP such as DDR, USB, PCI Express, embedded memories and logic libraries.

Navraj Nandra, Sr. Director of Marketing, Synopsys

Synopsys Demonstrates DesignWare HDMI 2.0 IP Solution

Join us in the Synopsys HDMI lab to see a demo of our HDMI 2.0 transmitter and receiver performance and features such as 4K video, YCbCr 4:2:0 colorimetry, and the HDCP 2.2 content protection standard.

Luis Laranjeira, R&D Manager, Synopsys

Reducing EMI in SerDes PHYs using Spread Spectrum Clocking

Learn what spread spectrum clocking (SSC) is and why it is important to high-speed SerDes design.

John Stonick, Synopsys Fellow, Solutions Group, Synopsys and Rita Horner, Sr. Technical Marketing Manager, Mixed Signal IP, Synopsys 

Designing IP for FinFET Technology: The Opportunities and Challenges

FinFETs are emerging as the device technology of choice at advanced nodes. This introduces new design challenges for IP development, which require knowledge of and experience in designing with FinFETs to ensure design success. This video describes the benefits and challenges of transitioning from planar to FinFET technologies and how IP plays a significant role in this transition.

Jamil Kawa, R&D Director, Synopsys 

SATA Host IP Demo Using a Port Multiplier and FIS-Based Switching

See how DesignWare SATA host controller IP issues read/write commands to Port Multiplier-attached drives, while FIS-based switching interleaves the data packets to enhance the utilization of the 6 Gbps SATA link bandwidth

Mat Loikkanen, SATA R&D, Synopsys