ASIP Designer Processor Modeling Training

This ASIP Designer™ online processor modeling training provides a deep dive into the concepts, languages and files that are used to capture a processor design. The training comprises 6 modules and is offered in the form of PowerPoint Slide Show (.ppsx) files, with audio narration for each slide. Use the links below to launch the training and to download pdfs of the training content.

If you have any comments, issues or general feedback about this training, please email asip-training@synopsys.com.

Training Modules

Additional training modules will be added as they become available.

ASIP Designer Introduction

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Primitives declaration and definition

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The nML processor description language

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PDG Modules

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The compiler processor header file

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Example processor models

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