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ASIP Designer Processor Modeling Training
This ASIP Designer™ online processor modeling training provides a deep dive into the concepts, languages and files that are used to capture a processor design. The training comprises 6 modules and is offered in the form of PowerPoint Slide Show (.ppsx) files, with audio narration for each slide. Use the links below to launch the training and to download pdfs of the training content.
If you have any comments, issues or general feedback about this training, please email asip-training@synopsys.com.
Training Modules
Additional training modules will be added as they become available.
ASIP Designer Introduction
- Download pdf
- View training
Primitives declaration and definition
- Download pdf
The nML processor description language
- Download pdf
PDG Modules
- Download pdf
The compiler processor header file
- Download pdf
Example processor models
- Download pdf
Events