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DesignWare Processor IP University
VIDEOS
EVENT PRESENTATIONS
tinyML Talks Webcast: Using TensorFlow Lite for Microcontrollers for High-Efficiency
Deeply-embedded AIoT applications doing neural network (NN) inference need to achieve specified real-time performance requirements on systems with limited memory and power budget. Meanwhile, developers want a convenient way of migrating their NN graph designs to an embedded environment. In this talk, we will describe how specific hardware extensions on embedded processors can vastly improve the performance of NN inference operations, which allows targets to be met while consuming less power. We will then show how optimized NN inference libraries can be integrated with well-known ML front-ends to facilitate development flows. To illustrate these concepts, we’ll show the Synopsys MLI Machine Learning Inference library running on a DSP-enhanced DesignWare ARC EM processor.
Automotive-Qualified IP for Evolving Integrated ADAS Domain Controller SoCs
In this presentation, our Automotive IP expert explains today's ADAS SoC market trends, the different IP blocks that designers are incorporating into such SoCs, and functional safety and reliability requirements that apply to IP and SoCs for ADAS applications.
WHITE PAPERS
Say Welcome to the Machine - Low-Power Machine Learning for Smart IoT Applications
This white paper presents a programmable processor and an associated software library for the efficient implementation of low/mid-end machine learning inference.
Efficient Low-Cost Implementation of NB-IoT for Smart Applications
This white paper highlights the key challenges of NB-IoT modem design. It proposes a hardware/software architecture concept based on a single small CPU/DSP processor for executing a NB-IoT software stack. We detail the DSP capabilities of such processors and illustrate their effective use with efficient implementations of key NB-IoT software kernels.
Softening Hardware: Using Application-Specific Processors to Optimize Modern SoC Designs
Read this white paper to learn about the ASIP design process, including the needed architectural considerations. Find out how ASIP Designer overcomes the obstacles that often plague ASIP development, reducing the effort and risk of deploying ASIPs in SoC designs.
Digital Signal Processing for Frequency-Modulated Continuous Wave RADARs
This paper provides an overview of RADAR technology as used in ADAS applications, including a summary of the relevant signal processing, typical computation requirements, and design parameters. It also considers approaches to estimating computational complexity and processing resource requirements and addresses some other system design tradeoffs.