DesignWare IP University: Cloud Computing
Testing PCI Express® 5.0 PHY Receiver Performance in the Absence of a Controller
This white paper describes a methodology for jitter tolerance testing without using the controller to negotiate a link. In addition, the paper outlines a procedure for calibrating the stressed eye representing the worst-case loss characteristics, and shows the jitter tolerance testing of the Synopsys PHY by using the Pattern Matching capability.
LPDDR4/4X DRAM Variants and Possible System Configurations
This whitepaper explains the various available LPDDR4/4X DRAMs and outlines the different possible system configurations with such DRAMs and concludes with a Signal Integrity (SI) based analysis with results for different C/A and DQ bus loads at various data-rates.
Which DDR SDRAM Memory to Use and When
Selecting the right memory solution is often the most critical decision for obtaining the optimal system performance. This whitepaper provides an overview of the JEDEC memory standards to help SoC designers select the right memory solution, including IP, that best fits their application requirements.