DesignWare IP Solutions for PCI Express

PCIe, PCIe IP, PCI Express

Overview

Shipping in volume production, Synopsys’ DesignWare® IP Solutions for PCI Express® (PCIe®) consist of silicon-proven digital controllers, PHYs and verification IP, all of which are designed to support all required features of the PCIe 5.0 32GT/s (Gen5), PCIe 4.0 16GT/s (Gen4), 3.1 8GT/s (Gen3), 2.1 5GT/s (Gen2) and 1.1 2.5GT/s (Gen1), and latest PIPE specifications. As the leading supplier of PCIe IP, Synopsys’ high-performance and compact DesignWare IP solutions for PCIe provide high-throughput, low-latency, and power-efficient external connectivity in SoCs for mobile, networking, storage, cloud computing, and automotive applications. Extensive interoperability testing with third-party products and strict quality measures combined with an expert technical support team enables designers to accelerate time-to-market and reduce integration risk.

Latency-Optimized PAM-4 Architecture for Next-Generation PCIe

This video presentation briefly describes how DesignWare IP for PCIe 5.0 is minimizing risk and accelerating time to market, and what Synopsys is doing to help designers prepare for next-generation PAM-4 PCIe 6.0 designs.

What's Hot in DesignWare PCIe 5.0 IP

Get the latest update on Synopsys' DesignWare Controller and PHY IP for PCIe 5.0 and how the low-latency,, power-efficient, and silicon-proven solution can enable your SoCs.