Empowering Education: Unleash Innovation with Cutting Edge Teaching Tools

The Synopsys University Software Program provides academic and research institutions electronic design automation (EDA) tools and technology that are essential for workforce development and academic research. Membership not only grants access to our tools but also includes educational resources such as curriculum and training.

Contact us to join our program

 


Tech Suite

EDA + -

Members enjoy exclusive access to nearly all cutting-edge EDA tools from Synopsys. Unlock everything essential for chip design and verification as well as advanced processes and models crucial for manufacturing chips. Elevate your teaching or learning experience with our comprehensive suite of tools that include 3DIC Compiler, Silicon Photonics Design Software, Technology Computer Aided Design (TCAD) and more.

Engineer in front of screen

Build better optical designs faster with software for imaging, illumination, automotive lighting, and photonic and optical network design.

Optical Solutions Student Licensing Program

660495303

Simpleware is now in our University Software Program! Offered as a separate bundle, researchers will have access to an industry-leading 3D image processing software that allows you users to convert 3D & 4D image data into models for seamless integration into medical workflows like patient specific medical device design, 3D Printing and simulation, or industrial workflows like non-destructive testing, reverse engineering and materials analysis.

Contact Simpleware

Simpleware


Membership benefits

SolvNetPlus

SolvNetPlus is a comprehensive knowledge base of all Synopsys products. Registered users from member universities can access SolvNetPlus as a convenient resource for technical articles, application notes, troubleshooting techniques, training content, and education materials like libraries, PDKs and memory compilers. All member universities have access to The SolvNetPlus Knowledgebase, which unlocks a collection of searchable articles covering many topics of Synopsys tools. Accessing SolvNetPlus grants members the key to enjoying the array of all benefits listed below.

Synopsys Learning Center

Training hub offers a wide range of courses in various delivery formats and allows for easy navigation as well as personalized learning experiences.

Curriculum

Synopsys provides universities with access to comprehensive curricula for Bachelor and Master Programs in IC design and EDA development.

Each full-semester course contains 15 weeks of material including syllabus, lectures, labs, homework, and exams. Synopsys tools are applied in the labs for a thorough and practical understanding of theoretical concepts introduced in each course. Professors at member universities may use these course materials to implement a new course or to supplement content in an existing course.

 

 

All courseware described below may be downloaded from Synopsys Learning Center  If your university is not yet a member of the Synopsys University Software Program and you would like to apply, please contact us.

IC Design Curriculum

Bachelor Degree Courses:
  • Introduction to Semiconductor Devices
  • Introduction to Circuits
  • IC Design Introduction
  • Digital Integrated Circuits
  • Semiconductor Technology 
  • Analog Integrated Circuits
  • Microprocessor Systems
  • IC Simulation Theory
  • Logic Design
  • IC Synthesis and Optimization
  • IC Physical Design
  • IC Testing

  Master Degree Courses:

  • Mixed-Signal IC Design
  • FPGA Prototyping
  • I/O Design
  • Design for Test
  • Low Power Design
  • Design of Embedded Systems
  • Rad-hard IC Design
  • RF IC Design
  • Crosstalk and Noise
  • Modeling and Optimization of IC Interconnects
  • IC Reliability
  • IC Physical Design Algorithms

EDA Curriculum

   Bachelor Degree Courses:

  • EDA Introduction
  • Discrete Mathematics and Probability
  • EDA Mathematical Methods 
  • Programming C++
  • Hardware Description Languages
  • Theory of Algorithms
  • Object-Oriented Programming
  • Operating Systems and System Programming
  • Scripting Languages
  • Software Development Technology Computational Geometry
  • Data Structures
  • Unix System Administration
  • Technical Writing

  

   Master Degree Courses:

  • Linear Algebra
  • Big Data
  • Contemporary Software Development Kits
  • EDA Tools
  • IC Physical Design Algorithms
  • Compilers Design
  • Digital Signal Processing
  • Numerical Methods
  • Probability Theory and Mathematical Statistics
  • Databases
  • Operational Research
  • IC Verification Algorithms

Advanced Courses:

   Bachelor Degree Courses:

  • Analog and Mixed-Signal IC Physical Design
  • Custom Analog Design Flow Tutorial
  • Statistical Techniques for Timing Analysis: Current State and Trends
  • Thermal and Electro-Thermal Simulation: Achievements and Trends
  • Signal and Power Integrity: Current State and New Approaches 
  • Verification Methodologies for Low Power
  • Characterization with SiliconSmart 
  • Signal Processing and Systems Theory

 Master Degree Courses:

  • High Speed SerDes Design
  • Synopsys EDA Tool Flow for Back-End Digital IC Design
  • Synopsys EDA Tool Flow for Front-End Digital IC Design
  • IC Synthesis and Optimization with Fusion Compiler
  • Advanced Methods in Logic Synthesis and Equivalence Checking
  • Low Power Design with SAED 14nm EDK
  • Low Power Methodology Manual for 14nm
  • Memory PHY and DRAM
  • Soft IP Development 
  • Universal Verification Methodology 
  • Analog Modeling with Verilog-A

General Courses:

Bachelor Degree Courses:
  • Numerical and Logic Bases of Digital Circuits
  • Electrotechnical Bases of Electronic Circuits
  • Chip Design
  • Static Timing Analysis
  • IC Fabrication
  • Fundamentals of Telecommunications
  • Introduction to RF Communication
  • RF Circuits 
  • Applied Probability
  • Python
  • Tool Command Language (TCL) 
  • Scripting Languages for Beginners 
  • Programming Languages and Compilers Verilog
  • Computer Networks
  • Fuzzy Logic
  • LINUX System and Network Administration
  • Computer Architecture and Engineering
  • Algorithms and Structural Programming
  • Database Management System
  • IC Schematic Design Algorithms
  • Introduction to Algorithms
  • User Interface Design 
  • ARC Processor-Based Embedded Programming
  • How to Create an Interoperable PDK
  • Physical Verification Runset Development

Master Degree Courses:

  • IC Design Flow
  • Synopsys Design Flow Tutorial
  • IC Design for Thermal Issues
  • SystemVerilog
  • Operational Calculus
  • Optimization Methods
  • Complex Functions
  • Fourier Transformations
  • Computer Language Engineering
  • Design of Programming Languages
  • IC Design Algorithms
  • Compiler Optimization and Code Generation

Libraries, PDKs and Memory compilers

Gain valuable experience using a complete design flow and to master advanced design methods, available to university members through SolvNetPlus

Generic Libraries 

Enable students to master advanced design methods for low power, IoT, and automotive applications using the latest Synopsys EDA tools.

Interoperable PDKs 

Enable students to master the design of analog and mixed-signal ICs and IPs using the latest Synopsys Custom Implementation tools. Each PDK includes documentation and design infrastructure elements.

Generic Memory Compiler 

Available for academic use when custom tailoring memory circuits for specific design needs.

Reference Methodology Retrieval System 

RMgen provides an easy way to configure and download product-specific and release-specific reference methodology scripts. These are a starting point for developing product-specific flow scripts. Customize the scripts to work in your design environment.

Synopsys Digital Design Resource Center

VLSI Fundamentals: A Practical Approach – Arm®

The Synopsys Digital Design Resource Center is created to support your educational and research activities in core VLSI design using cutting-edge Synopsys tools.

Empower participants with a comprehensive understanding of key concepts in IC design (Simulation and Physical implementation) and guide them through a hands-on learning path to proficiently implement and verify these concepts using industry-leading Synopsys tools.

Participants will acquire the skills to describe a subsystem in Verilog, System Verilog, VHDL and/or other high-level languages, and verify it. This course will ensure a thorough exploration into the RTL to GDSII Synthesis, implementation and signoff methodology, it will also provide an in-depth understanding of our Synopsys tools to enhance your learning experience.

The learning path includes:

5 self-training modules to facilitate a comprehensive understanding of the digital flow using Synopsys tools 

2 university curriculum materials designed for professors to use in the classroom. Each module includes lectures, labs, and sample assessments.

 

Syllabus + -

1.      Logic simulation

2.      Logic Synthesis

3.      Timing & area constraint

4.      Logic synthesis strategies 

5.      Design for Test 

6.      Attributes and Constraints 

7.      Compile Strategies 

8.      Physical Design Data

9.      Design Planning 

10.  Clock Tree Synthesis 

11.  Placement

12.  Routing

13.  Power Optimization 

14.  Synthesis for low power 

15.  On Chip Variations 

16.  Physical Verification 

17.  Power Estimation 

18.  Static Timing Analysis Concepts 

19.  Delay Modeling

20.  Interconnect Parasitics 

21.  Delay Calculation 

22.  Configuring the Static Timing Analysis Environment 

23.  Generating Timing Reports 

24.  Crosstalk and Noise 

25.  Statistical Static Timing Analysis 

26.  Gate simulation 

Request to download the Arm M0 core:

Cortex-M0 (arm.com)

All Synopsys software tools required for the practical part are available through the Synopsys University Software Program

University Software Program members can access Synopsys Digital Design Resource Center

through SolvNet

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Additional Resources

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Access curricula and resource downloads (SolvNetPlus ID and password required)

Explore EMBARC

The embARC Community is a free online resource for developers of embedded applications for ARC processors.