Prior to the rise of SoC prototyping, hardware and system design could be very risky because feedback would only occur after producing a test chip or even the final SoC. Setting up test environments for hardware projects is time consuming, and if compliance testing is also needed, the setup time is even longer with lots of manual work. This drawn-out process can lead to a lack of consistency in testing.
With physical prototyping, such as HAPS prototyping systems and DesignWare IP Prototyping Kits, designers can start designing and iterating prior to final hardware availability, saving weeks or months of development time.
DesignWare IP Prototyping Kits provide the essential hardware and software elements needed to reduce IP prototyping and integration effort. Implemented on Synopsys HAPS-DX physical prototyping systems, these platforms are used as a proven and complete reference design with validated IP configurations and necessary SoC integration logic and the necessary software drivers for targeting system bring-up, debug and testing.
Using physical prototyping as a co-design environment gives designers an earlier understanding of the impact of design decisions in the system, code and configurations. Decisions can be verified with real world I/Os and hardware, which allows both hardware and software teams to make choices that streamline SoC design and testing. The blurred lines between these two worlds is vanishing due to the adoption of prototyping methodologies and verification flows where hardware and software design are tightly coupled (Figure 2).