HAPS-80 Series FAQ

1. What is new and exciting about the HAPS-80 FPGA-Based Prototyping Solution?

Answer: The new HAPS-80 FPGA-Based Prototyping Solution is the fastest, most affordable way to validate SoC and ASIC designs. The HAPS-80 prototyping solution offers:

  • Performance capabilities to yield 30 to 100 MHz performance for a multi-FPGA design (300 MHz for a single FPGA design)
  • Automated partitioning features to reduce time to first prototype to less than two weeks on average
  • Features for multi-design mode to support enterprise configurations up to 1.6 billion ASIC gates and concurrent design execution
  • Built-in debug capabilities for minimally invasive debug and the ability to capture thousands of RTL signals
  • Support for hybrid use modes and integration with simulation and emulation technologies to save months of design and verification bring-up time
  • Backward compatibility with HAPS-70 to enable reuse of daughter boards and cables

2. What is ProtoCompiler prototyping software?

Answer: ProtoCompiler prototyping software for HAPS is a single tool that allows you to manage prototype board resources, enable debug, partition logic, and synthesize. High capacity, timing-driven partition and system-route engines quickly solve the most difficult partition problems while optimizing for the fastest system clock performance. Logic synthesis for HAPS provides dedicated HDL compilers and optimization tuned to your objective whether it is the shortest bring-up time or highest system performance.

3. Why is the integration of HAPS and ProtoCompiler software important to automate partitioning and accelerate time to first prototype while providing the highest performance?

Answer: Partition automation setup is easier and the results are more reliable because of the HAPS equipment characterization. For example, chip-to-chip latency and connector signal granularity produces higher quality partition floorplans and system route solutions by ProtoCompiler. Time to first prototype is shortened by providing fully automated TDM circuit integration, routing of communication buses and debug instrumentation, and high-capacity debug storage for troubleshooting and protocol validation.

4. Does ProtoCompiler support other prototyping boards?

Answer: No. Synopsys ProtoCompiler is integrated with HAPS systems to deliver the highest system performance unmatched by traditional “budget” circuit boards and FPGA design tools. Detailed hardware knowledge of the HAPS system architecture, high speed connectors, I/O structure, and clocking organization are required to fully optimize a solution that enables ProtoCompiler to provide the highest performance and fastest way to bring-up the prototype environment.

5. What is the new proprietary high-speed time-domain multiplexing (HSTDM) technology and how will this improve performance and the quality of the overall project development?

Answer: The new proprietary high-speed time-domain multiplexing (HSTDM) technology takes advantage of HAPS-80’s new capabilities to deliver maximum multi-FPGA performance with a minimum of devices. ProtoCompiler automatically selects the optimum mix of pin-multiplexing schemes to best match the design under test. The HAPS-80 solution delivers performance of up to 300 MHz for single FPGA designs, global synchronous performance of 100 MHz for multi-FPGAs without chip-to-chip pin-sharing, and up 30 MHz for multi-FPGA scenarios that do require pin-sharing. The increased system performance of the HAPS-80 systems enables OS booting to the command prompt in less than a minute, allowing designers to probe and initialize device hardware such as CPU, timers and UARTs. HAPS-80 also enables at-speed operation of real world I/O.

6. What debug capabilities are included with the HAPS-80 Series FPGA-Based Prototyping Solution?

Answer: HAPS-80 solutions deliver superior debug visibility and automation through always available HAPS Deep Trace Debug Gen4 (DTD4) technology, providing the ability to capture over 1000 debug signal bits per FPGA at speed or seconds of debug data. Debug data acquisition, debug storage memory, and dedicated debug routes are built into the HAPS-80 systems and inserted automatically by ProtoCompiler to ensure minimally invasive debug is always available to the user. These debug features provide an array of capabilities which can be deployed at any stage of the ASIC prototyping project ensuring that the source of a design bug can be located as fast as possible. In combination with the Synopsys Verdi™ debug software, HAPS DTD4 helps designers rapidly visualize complex design behavior in the context of the original RTL source for a simulator-like experience, reducing debug time by up to 50 percent. In addition, HAPS and ProtoCompiler integration with Verification Continuum’s Unified Compile technology enables seamless transition between Synopsys VCS, ZeBu and HAPS to save months of design time.

7. What workstation connectivity solution does the HAPS-80 provide that will enable high-bandwidth communication?

Answer: The Synopsys Universal Multi Resource Bus (UMRBus) is a high-speed communications interface designed into HAPS-80 systems to enable workstation-based access to the FPGA-based prototype. This connection solves the bandwidth and reliability problem with options for USB or PCIe physical connection and a robust API for software driven communication with the physical prototype. Some of the major features of HAPS-80 enabled by the UMRBus include:

  • Up to 400MB/s host connection to DUT
  • C/C++/Tcl API for HAPS
  • USB or PCIe host connection
  • Optional AXI, AHB, APB protocol interface up to 130MB/s

The Synopsys UMRBus host connectivity enables hybrid prototyping, global accessibility and prototype server farm use modes. The UMRBus provides the infrastructure for a seamless link between HAPS systems and Synopsys’ Virtualizer-based virtual prototypes to create an integrated hybrid prototyping environment for early software development and hardware/software integration.

8. What types of testing release criteria are used to ensure the highest quality and reliability of HAPS-80 systems before they are ship to users?

Answer: A combination of extensive testing and strict product release criteria helps ensure that HAPS users enjoy the benefits of high availability, reliability, and functional consistency across units. Hardware characterization conducted by Synopsys includes application tests of interconnect cables, HapsTrak® standard daughter boards, FPGA modules, and power supply modules. Each HAPS system shipped to an end-user site includes a HAPS System Production Test Certificate that provides a summary of the test results for the system assembly. To ensure a high standard of reliability and quality every HAPS system must pass the defined release criteria before the system is released to an end-user.

9. Why should a customer who builds their own FPGA-Based prototype boards or is using another commercial vendor consider the HAPS-80 prototyping solution instead?

Answer: Synopsys’ HAPS-80 systems leverage 10+ years of FPGA-based prototyping experience and four generations of high-quality product deployments, leading to several key advantages over build-your-own and competitive prototyping boards:

  • Integration with ProtoCompiler to minimize the effort and time required to bring-up and then deploy a Synopsys HAPS Series system with automation features to ease design planning, logic synthesis, debug, and workstation connections.
  • Superior debug visibility and automation through always available HAPS Deep Trace Debug Gen4 (DTD4) technology, providing the ability to capture over 1000 debug signal bits per FPGA at speed.
  • An integrated high-speed UMRBus interface bus for remote accessibility, direct hardware connection via TCL or C/C++ programming, transaction-based validation, and hybrid prototyping
  • Flexible I/O interconnect that facilitate easy movement of prototyping designs, cable connections, and daughter boards
  • A rich selection of Synopsys DesignWare IP daughter boards for common IP blocks such as DDR3, SRAM, PCIe, SATA, and Ethernet pre-validated with HAPS systems enables efficient integration of IP blocks and earlier software development
  • Worry-free setup and integrated system check utility
    • Graphical user interface for ease of use and TCL interface for scriptable configuration
    • Automated handling of clock and reset distribution
    • Shutdown protocols protecting your investment
    • Real time data integrity checks of HSTDM links
    • Fast configuration and FPGA programming over UMRBus
    • System check ensuring cables, daughter boards, and system configuration setup match the prototyping design database
    • System performance analyzer that profiles the physical connections on the system ensuring the desired cable connector or HSTDM connection performance is met
  • Immediate availability, reducing design effort and schedule risk associated with building and maintaining custom-built internal boards
  • Lower total cost of ownership due to a scalable and flexible prototyping platform that can be reused for many different projects and designs
  • Availability of expert services to accelerate deployment and bring-up of your design in HAPS-80 systems

10. How is the HAPS-80 prototyping solution different from the HAPS-70 system?

Answer: The HAPS-80 prototyping system has improved in the following areas compared with HAPS-70.

  • Integrates the latest Xilinx Virtex UltraScale VU440 FPGA device to support a wide range of designs, from IP to systems-on-chip (SoCs) in excess of 1.6 billion ASIC gates.
  • Always available HAPS Deep Trace Debug Gen4 (DTD4) technology provides minimally invasive debug and the ability to capture over 1000 debug signal bits per FPGA at speed.
  • New proprietary high-speed time-domain multiplexing (HSTDM) technology that delivers maximum multi-FPGA performance with a minimum of devices.
  • Integrates a native Ethernet interface and runtime management server that will allow remote clients to access the prototype, configure, monitor, and run designs to one or more FPGAs.

11. What are the primary uses for FPGA-based prototypes?

Answer: FPGA-based prototypes provide SoC design teams with cycle-accurate, high-performance execution and real-world interface connectivity. They are primarily used to facilitate software development, hardware/software integration and system validation.

12. Should existing HAPS customers consider upgrading to the HAPS-80 series?

Answer: HAPS-70 and HAPS-DX users will benefit from the following HAPS-80 features:

  • HAPS-80 systems take advantage of the latest generation Xilinx Virtex UltraScale FPGA devices and a scalable architecture to support designs in excess of 1.6 billion ASIC gates
  • HAPS-80’s new time-domain multiplexing (MGTDM) capabilities will deliver maximum multi-FPGA performance with a minimum of devices
  • The flexibility and matched pin connections between the Virtex UltraScale I/O banks and HapsTrak 3 connectors enable HAPS-80 users to utilize I/O bandwidth where it is needed most while minimizing the number of unused pins
  • The Universal Multi-Resource Bus (UMRBus) easy to use API and host connectivity option has been enhanced to support up to 400 MB/s bandwidth.
  • Built-in debug always available HAPS Deep Trace Debug capabilities for minimally invasive debug and the ability to capture over 1,000 debug signal bits per FPGA
  • The HAPS-80, HAPS-70, and HAPS-DX Series are interoperable and compatible with HapsTrak 3/MGB accessory equipment to support assembly of multiple prototype projects.

13. How many different system configurations are available in the HAPS 80 Series?

Answer: The HAPS-80 Series is available in four model variants to support a wide range of designs sizes, from IP to systems-on-chip (SoCs) in excess of 1.6 billion ASIC gates.

Product Configuration

Capacity (ASIC gates)

HAPS-80 S26

Up to 26 million

HAPS-80 S52

Up to 52 million

HAPS-80 S104

Up to 104 million

Custom Configuration

Up to 1.6 billion

14. Can the HAPS-80 be used globally and support multi-design mode?

Answer: Yes, HAPS-80’s native Ethernet connection enables global system accessibility via connection to a standard Ethernet hub with no additional hardware. In addition, HAPS-80 and ProtoCompiler support multi-design mode to enable execution of multiple designs simultaneously across HAPS systems, delivering the highest utilization of the prototype server farm and greater return on investment from multiple project usage. Multi-design capabilities include:

  • Client/Server system configuration software
  • Remote access
  • Multi-design
  • Job queue

15. Is HAPS and ProtoCompiler going to support the Synopsys Verification Continuum?

Answer: Yes, HAPS and ProtoCompiler integration with the Verification Continuum’s Unified Compile technology is supported enabling an easy transition between Synopsys VCS, ZeBu and HAPS to save months of product development.

16. Is the HAPS-80 prototyping solution going to be backwards compatible with previous generations of HAPS systems?

Answer: Yes, users will be able to continue to re-use their investment of HAPS-70 and HAPS-DX systems with the new HAPS-80 prototyping systems. This is possible with the ProtoCompiler software tool recognizing the various product series enabling mixed support and backwards compatibility between the HAPS-80, HAPS-70 and HAPS-DX systems. In addition, the HAPS-80 system is backward compatible with the wide library of HapsTrak® 3 daughter boards, cables, and accessories.

17. Does the HAPS-80 prototyping solution support Hybrid Prototyping?

Answer: Yes, through the HAPS UMRBus host connectivity, the HAPS-80 solution enables Hybrid Prototyping. The UMRBus provides an easy connection between the HAPS-80 systems and Synopsys’ Virtualizer-based virtual prototypes for early software development and hardware/software integration.

18. How can I quickly prepare a HAPS prototyping environment for my ASIC IP validation or full SoC prototyping project?

Answer: You can visit the HAPS System Builder website at http://www.synopsys.com/apps/haps80ssb/#/

The HAPS System Builder will allow you to plan the prototype system resources, connectivity options, and generate a report of the recommended Synopsys hardware and software requirements of the target SoC design prototype.

19. When will the HAPS-80 prototyping systems be available?

Answer: HAPS-80 FPGA-based prototyping systems along with the ProtoCompiler software are available now to support your ASIC and SoC project development requirements.

20. Will Synopsys continue to sell the HAPS-70 series?

Answer: Yes, the HAPS-70 Series product line will continue to be available.

21. Where can I find more information on the HAPS-80 prototyping solution?

Answer: More information is available through the following links:

HAPS-80 Prototyping Solution:
http://www.synopsys.com/Prototyping/FPGABasedPrototyping/Pages/haps-80.aspx

Blog: Breaking the Three Laws
http://blogs.synopsys.com/breakingthethreelaws/

HAPS System Builder
http://www.synopsys.com/apps/haps80ssb/#/