By Howard Ko, Senior Vice President & General Manager, Silicon Engineering Group
The semiconductor industry is being challenged as never before when it comes to device patterning technology. While development of new patterning techniques and resists, as well as inspection and metrology capabilities, have helped advance device scaling, new issues continue to challenge the continuation of Moore’s Law, as well as ‘More than Moore’ devices.
Economics have always been the key driving force for technology evolution in the industry. The continued push for more advanced applications and lower-cost products has been behind many familiar trends – shrinking technology nodes, ever-larger design sizes, continued growth of both optical-proximity correction (OPC) flow complexity and post-OPC file sizes, and escalating mask write times.
Today, the most significant trend in this respect is the increasing number and diversity of new materials being used for imaging. As Figure 1 shows, new technologies are being added along the axis of Moore’s Law, from the 14nm node down to 7nm. Those in red will require new materials, and are growing in number and impact with each new node. Moreover, their impact is not limited to emerging nodes.
Along the More than Moore axis, in areas such as displays, CMOS image sensors (CIS) and MEMS – where advanced designs are being developed at established nodes – these new materials are making their presence felt as well. Because the geometries are not as demanding, the challenges are less complicated, but they must still be dealt with.