Coverage Highlights Archives

In Verification, Physics Intrudes Forcefully At 28 nm
Electronic Design
December 21. 2010

To Err Is Universal
Electronic Engineering Journal
December 14, 2010

The Deafening Problem Of High-Speed I/O
Low-Power Engineering Community
December 2, 2010

Synopsys beats analysts’ expectations
EE Times
December 1, 2010

LightTools enhances lighting design capabilities for the development of luminaires
Electronics World
November 19, 2010

TSMC qualifies Synopsys' IC Validator for 40nm, 65nm
EE Times
November 17, 2010

Synopsys in Armenia Among Twelve Finalists to Receive U.S. Secretary of State's 2010 Award for Corporate Excellence
Gabe on EDA
November 11, 2010

Is social media really helping semicon/VLSI firms?
Pradeep’s Point
November 10, 2010

Synopsys debuts DesignWare STAR ECC IP
Test & Measurement World
November 6, 2010

Carl Zeiss and Synopsys Collaborate on Die Metrology
Chip Design
October 28, 2010

Himax licenses Synopsys' Galaxy, Discovery tools
EE Times
October 26, 2010

100 Tapeouts Underscore Rapid and Broad Acceptance of Synopsys' In-Design Physical Verification
Gabe on EDA
October 12, 2010

Synopsys acquires Optical Research Associates
October 11, 2010

EDA Focus: HSPICE Enhances Speed and Capacity
Microwave Journal
October 9, 2010

Synopsys adds to consolidation trend
October 8, 2010

Synopsys makes optical design software foray
October 8, 2010

Making Too Much Noise
Low-Power Engineering Community
October 7, 2010

Paradox of Pursuit; Synplify Saves Synthesis - Again
FPGA & Programmable Logic Journal
September 29, 2010

Synopsys enhances FPGA synthesis – 4X speedup plus team design capabilities
Programmable Logic DesignLine
September 27, 2010

Software Drives Design Requirements
System-Level Design Community
September 23, 2010

Moving To Open-Source Software
System-Level Design Community
September 23, 2010

HSPICE 2010 advanced analysis features provide a high-performance analog verification solution
EE Times (Design)
September 20, 2010

Simulation gets 7X speed boost
New Electronics
September 20, 2010

Synopsys wraps $315M acquisition of Virage Logic
Yahoo! Finance
September 2, 2010

Using In-Design Physical Verification to Reduce Tapeout Schedules
EE Times (Design)
July 30, 2010