SNUG UK 2016 Proceedings

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Complete Proceedings


User Papers and Presentations
A1 - Test for Automotive & Complex Designs
Optimisation of DFTMAX Ultra Scan Patterns
Author(s): Richard Illman - Dialog Semiconductor; Henning Behrmann - Dialog GmbH
PaperPresentation

A2 - Advanced Logical Implementation I
Conclusive Formal Verification of Clock Domain Crossings using SpyGlass-CDC
Author(s): Mejid Kebaïli, Jean-Christophe Brignone - STMicroelectronics; Guillaume Plassan, Jean-Philippe Binois - Synopsys
PaperPresentation

A4 - Verification I
CTAL - Clock Tree Abstraction Layer (2nd Place - Best Paper)
Author(s):
PaperPresentation

Effective SystemVerilog Functional Coverage: Design and Coding Recommendations (Technical Committee Award Honorable Mention)
Author(s): Jonathan Bromley, Mark Litterick- Verilab GmbH
PaperPresentation

A5 - Custom and Analog Mixed-Signal I
Bringing Harmony to Analogue Testbenches by Utilizing Verilog-A (1st Place - Best Paper)
Author(s): Peter Grove - Dialog Semiconductor
PaperPresentation

B2 - Advanced Logical Implementation II
The Causes and Identification of Inefficient and Redundant Clock Gating (Technical Committee Award)
Author(s): Esra Sahin, Richard Illman - Dialog Semiconductor
PaperPresentation

B4 - Verification II
Improving X Debug in X Prop and GLS Simulations (3rd Place - Best Paper)
Author(s): Karthik Baddam - Imagination Technologies; Piyush Sukhija - Synopsys
PaperPresentation

Reusable Verification Framework
Author(s): Gunther Clasen - EnSilica
PaperPresentation

B5 - Custom and Analog Mixed-Signal II
Comprehensive AMS Verification Using Octave, Real Number Modelling and UVM
Author(s): Patrick Lynch, John McGrath, Ali Boumaalif - Xilinx
PaperPresentation

C3 - High-Performance Implementation III
Floorplan a Multi-Million Gate, Leading Edge, Complex Processor Cluster? You’ll Have it in Less Than a Week
Author(s): Max Walker, Maya Mohan, Nagesh Sakhamuru - Imagination Technologies; Simon Bloyce, Jason Jackson, David Kingston - Synopsys
PaperPresentation

C4 - Verification III
Formal Coverage Analysis: Concepts and Practicalities
Author(s): Sergio Marchese - HUAWEI Technologies
PaperPresentation

Tutorials
A1 - Test for Automotive & Complex Designs
Lowering DPPM and Testing Safety-Critical Circuits with Synopsys Test Automation Tools
Author(s): Dave Johnson - Synopsys
Tutorial

A2 - Advanced Logical Implementation I
Advanced Reporting with PrimeTime
Author(s): Simon Bloyce - Synopsys
Tutorial

A3 - High-Performance Implementation I
Effective ICG Enable Timing Optimization: Exploring the Optimization Space
Author(s): Jonathan Dawes - Synopsys
Tutorial

B1 - Automotive and Safety Critical I
Build in Software Security Throughout the Automotive Supply Chain
Author(s): Ashley Benn - Synopsys
Tutorial

Reach ASIL Targets for Automotive Designs with Ethernet QoS IP and Certitude
Author(s): John Swanson - Synopsys
Tutorial

B2 - Advanced Logical Implementation II
Design Compiler Family 2016.03 Update and Faster Runtime Best Practices for Large Designs
Author(s): Laurens Drost - Synopsys
Tutorial

B3 - High-Performance Implementation II
Best Practices for High-Performance, Energy Efficient ARM® Cortex®-A73 Implementation in 16FF+ Process Technology using Synopsys Galaxy Design Platform
Author(s): Joe Walston - Synopsys
Tutorial

B5 - Custom and Analog Mixed-Signal II
Utilizing Nettypes with VCS AMS Debug with Verdi AMS/Waveview
Author(s): Peter Thompson - Synopsys
Tutorial

C1 - Automotive and Safety Critical II
Accelerating the Path to a Safe and Secure SoC
Author(s): Fergus Casey - Synopsys
Tutorial

Designing Safer Cars – A Journey in ISO 26262 Territories
Author(s): Jean-Marc Forey - Synopsys
Tutorial

C2 - Advanced Logical Implementation III
Formality Complete Low Power Verification
Author(s): Robert Hatt - Synopsys
Tutorial

Functional ECO User Case Studies Using Formality Ultra
Author(s): Paul Usher - Synopsys
Tutorial

C3 - High-Performance Implementation III
Floorplanning Blocks Using IC Compiler II
Author(s): Andrew Saunders - Synopsys
Tutorial

C4 - Verification III
Is Your Coverage "Glass" Half Full or Half Empty? An Introduction to VC-Formal Coverage Analysis
Author(s): Douglas Fisher - Synopsys
Tutorial

C5 - Custom and Analog Mixed-Signal III
Custom Compiler: Assisted Layout Automation Walk-Through Demo
Author(s): Andrew Milne - Synopsys
Tutorial

User Presentation
A3 - High-Performance Implementation I
Implementing the Complete Signoff-Ready Reference Flow for Imagination Technologies PowerVR GPU Cores using Synopsys’ Next Generation Tools
Author(s): Dave Stanley - Imagination Technologies
Presentation

A5 - Custom and Analog Mixed-Signal I
CCK GUI Integration Flow – Successes and Challenges
Author(s): Lior Dagan, Catalin Tugui, Peter de Vreede - Dialog Semiconductor
Presentation

C5 - Custom and Analog Mixed-Signal III
De-Mystifying TCL Custom Application Creation in Custom Compiler, with Automatic AMS IP Block Documentation as an Example
Author(s): Vitalii Kudriavtcev - Elmos Semiconductor AG; Damian Roberts - Synopsys
Presentation
SNUG 2017 Keynote

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