SNUG UK 2015 Proceedings

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Complete Proceedings


Speeches
Keynote Address
Silicon to Software - 'Shift Left!'
Author(s): Deirdre Hanford, Executive Vice President, Customer Engagement - Synopsys

User Papers and Presentations
A1 - Design for Test I
Generating Scan Patterns for Scan Chains with Intermittent Timing Problems
Author(s): Richard Illman - Dialog Semiconductor
PaperPresentation

Optimisation of DFTMAX Scan Patterns (Technical Committee Award)
Author(s): Richard Illman, Hans Martin von Staudt - Dialog Semiconductor
PaperPresentation

A2 - Advanced Logical Implementation I
An Optimal Approach for Datapath Implementation & Verification Methodology
Author(s): Poonam Rani, VSRP Kumar - Imagination Technologies
PaperPresentation

Writing Efficient Timing Constraints and Accelerating Timing Closure with PrimeTime
Author(s): Ramnath Bommu Subbiah Swamy - ARM
PaperPresentation

A4 - Verification I
Migrating to UVM Verification Environment for Imaging Applications
Author(s): Kevin Rowley, Boris Rizov - Apical Imaging
PaperPresentation

Navigating Your Way Toward UVM Version 1.2
Author(s): John Aynsley, David C. Black, Eileen R. Hickey - Doulos
PaperPresentation

A5 - Analog Mixed-Signal Verification I
Automatic Feed-through Parasitic Extraction for Memory Compiler Spice Simulations
Author(s): Amit Kakkar, Fabien Leroy - ARM
PaperPresentation

CCK - Using TCL API with Static Voltage Propagation for Detection of ESD and Stress Violations
Author(s): Lior Dagan, Catalin Tugui - Dialog Semiconductor
PaperPresentation

B3 - High-Performance Implementation II
Investigating the Next Generation Place and Route Tool (Technical Committee Award Honorable Mention)
Author(s):
PaperPresentation

B4 - Verification II
SystemVerilog Assertions Verification with SVAUnit
Author(s): Ionut Ciocirlan, Andra Radu - AMIQ Consulting
PaperPresentation

Transaction-level Assertions in UVM (3rd Place - Best Paper)
Author(s): Steve Holloway - Dialog Semiconductor
PaperPresentation

Writing Portable and Configurable SystemVerilog Assertions in a UVM Environment
Author(s):
PaperPresentation

B5 - Analog Mixed-Signal Verification II
Mixed-signal Validation from a Full-chip Perspective
Author(s):
PaperPresentation

C2 - Advanced Logical Implementation III
Efficiently Reducing Dynamic Power Consumption of Power Management Integrated Circuits (PMICs)
Author(s): Esra Sahin - Dialog Semiconductor
PaperPresentation

Minimum Energy Design for Sub-threshold Wireless Sensor Nodes
Author(s): Seng Oon Toh, James Myers - ARM
PaperPresentation

C3 - High-Performance Implementation III
Implementing DDR3 Memory Interface Routing - Challenges Faced and Overcome (2nd Place - Best Paper)
Author(s): Yun Xiao - Imagination Technologies
PaperPresentation

C4 - Verification III
Accessing DesignWare Sensor and Control IP Subsystem Resources in an OVM/UVM Testbench Using a Register Abstraction Layer (RAL)
Author(s):
PaperPresentation

RESSL UVM Sequences to the Mat
Author(s): Jonathan Bromley, Jeff McNeal, Bryan Morris - Verilab
PaperPresentation

C5 - Analog Mixed-Signal Verification III
Supercharging Verilog-AMS Starting with Connect Modules (1st Place - Best Paper)
Author(s): Peter Grove - Dialog Semiconductor
PaperPresentation

Tutorials
A3 - High-Performance Implementation I
High-Performance, Energy Efficient Implementation of the ARM Cortex-A72 Processor Core in 16-nanometer FinFET Plus (16FF+) Process Technology Using Synopsys Galaxy Design Platform
Author(s): Joe Walston - Synopsys
Tutorial

A4 - Verification I
Better Verification and Debug with Native Integrations of Verdi and Certitude and VCS
Author(s): Yassine Eben Amine - Synopsys
Tutorial

B1 - Design for Test II
Lowering DPPM Through Advanced Fault Models
Author(s): Dave Johnson - Synopsys
Tutorial

Six Ways that Scan Diagnostics Drives Silicon Learning
Author(s): Dave Johnson - Synopsys
Tutorial

B2 - Advanced Logical Implementation II
Low Power Design with UPF in the Synopsys DesignWare PCIe IP
Author(s): Eoghain O Reilly - Synopsys
Tutorial

Low Power Static Checking: A Deeper Look at Debugging
Author(s): Tom Ryan - Synopsys
Tutorial

B5 - Analog Mixed-Signal Verification II
Using ICC in an Analog Top Custom Designer Flow
Author(s): Andrew Milne - Synopsys
Tutorial

C1 - FPGA Implementation and FPGA-based Prototyping I
HAPS FPGA Based Prototyping Implementations using AMBA Transactors
Author(s): Andy Jolley - Synopsys
Tutorial

C3 - High-Performance Implementation III
IC Compiler II - Accelerating Products to Market with the Power of 10X
Author(s): Saleem Haider, Thomas Andersen - Synopsys

C4 - Verification III
VC Apps - Realize Your Idea for Enhancing Debug Productivity
Author(s): Ajay Sharma - Synopsys
Tutorial

C5 - Analog Mixed-Signal Verification III
Advanced Techniques for Verification of Mixed-signal SoCs
Author(s): Damian Roberts - Synopsys
Tutorial

User Presentation
B3 - High-Performance Implementation II
Hardening Imagination's 16FF+ PowerVR Series7 GPU for Performance and Power with DesignWare HPC Design Kit
Author(s): John Herbert - Imagination Technologies
Presentation

C1 - FPGA Implementation and FPGA-based Prototyping I
Nokia - High-speed Interfaces in FPGA Prototyping
Author(s): Teemu Sirvio - Nokia
SNUG 2017 Keynote

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