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| User Papers and Presentations |
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Technology Keynote - The Rise of the Internet of Things and the Role of EDA, IP and Software
Author(s): Mr. Don Chan, Vice President, Corporate Applications Engineering, Design Business Group - Synopsys, Inc. |
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Upleveling Software Development Lifecycle to Eliminate Vulnerabilities Proactively
Author(s): Mr Olli Jarva, Senior Manager, Field Applications Engineering, Software Integrity Group - Synopsys (Singapore) Private Limited |
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| Backend Design Track |
User Paper 1: Laker Frame Structure Generation
Author(s): GLOBALFOUNDRIES |
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User Paper 2: Power Switch Container Holder Methodology for Effective Early Power Analysis and Design (3rd Place - Best Paper)
Author(s): |
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User Paper 3: APR Custom Trunking Method with Metal Shielding
Author(s): |
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User Paper 4: Accelerating Manufacturing Compliance Using ICV In-Design Flow Within IC Compiler II for Emerging Technology Nodes
Author(s): MediaTek Singapore Pte Ltd |
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User Paper 5: Advanced Design Methodologies Physical Aware Transition Fixing in Multiple Power Domains
Author(s): MediaTek Singapore Pte Ltd |
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User Paper 6: An ECO Approach at Silicon-Freeze Stage
Author(s): Realtek Singapore Pte Ltd |
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| Frontend Design - Track I |
User Paper 1: Comprehensive Solution for Burn-In Test
Author(s): |
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User Paper 2: Noble Logic Duplication Flow for Fixing Min-Max Timing Path (3rd Place - Best Paper)
Author(s): |
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User Paper 3: Leakage Recovery ECO
Author(s): |
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User Paper 4: Automated Timing Violations Categorization (1st Place - Best Paper)
Author(s): |
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User Paper 5: Concurrent ATE Testing of Multi-IPs in a Large SoC
Author(s): |
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User Paper 6: Connectivity-Based Constraints Generator (2nd Place - Best Paper)
Author(s): Xilinx Asia Pacific Pte Ltd |
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| Frontend Design - Track II |
User Paper 1: The Unfair Advantage of Hybrid Verification Strategy
Author(s): Future Technology Devices International Limited |
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User Paper 2: Mixed-Signals Data Paths Delay Match (3rd Place - Best Paper)
Author(s): |
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User Paper 3: Building Zero-Latency AHB Subsystem with CoreAssembler and DW Ips
Author(s): |
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User Paper 4: Novel Approaches to Integrate Floating Point in an Embedded System
Author(s): |
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User Paper 5: Comprehensive Methodology for Early Power Estimations and Effective Power Sign-off (1st Place - Best Paper)
Author(s): Infineon Technologies Asia Pacific Pte Ltd |
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User Paper 6: Power-Integrity Challenges During Scan-Test: A Case Study to Mitigate Electrical Challenges (2nd Place - Best Paper)
Author(s): |
