SNUG Singapore 2015 Proceedings

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Complete Proceedings


User Papers and Presentations
Technology Keynote - The Rise of the Internet of Things and the Role of EDA, IP and Software
Author(s): Mr. Don Chan, Vice President, Corporate Applications Engineering, Design Business Group - Synopsys, Inc.

Upleveling Software Development Lifecycle to Eliminate Vulnerabilities Proactively
Author(s): Mr Olli Jarva, Senior Manager, Field Applications Engineering, Software Integrity Group - Synopsys (Singapore) Private Limited

Backend Design Track
User Paper 1: Laker Frame Structure Generation
Author(s): GLOBALFOUNDRIES
PaperPresentation

User Paper 2: Power Switch Container Holder Methodology for Effective Early Power Analysis and Design (3rd Place - Best Paper)
Author(s):
PaperPresentation

User Paper 3: APR Custom Trunking Method with Metal Shielding
Author(s):
PaperPresentation

User Paper 4: Accelerating Manufacturing Compliance Using ICV In-Design Flow Within IC Compiler II for Emerging Technology Nodes
Author(s): MediaTek Singapore Pte Ltd
PaperPresentation

User Paper 5: Advanced Design Methodologies Physical Aware Transition Fixing in Multiple Power Domains
Author(s): MediaTek Singapore Pte Ltd
PaperPresentation

User Paper 6: An ECO Approach at Silicon-Freeze Stage
Author(s): Realtek Singapore Pte Ltd
PaperPresentation

Frontend Design - Track I
User Paper 1: Comprehensive Solution for Burn-In Test
Author(s):
PaperPresentation

User Paper 2: Noble Logic Duplication Flow for Fixing Min-Max Timing Path (3rd Place - Best Paper)
Author(s):
PaperPresentation

User Paper 3: Leakage Recovery ECO
Author(s):
PaperPresentation

User Paper 4: Automated Timing Violations Categorization (1st Place - Best Paper)
Author(s):
PaperPresentation

User Paper 5: Concurrent ATE Testing of Multi-IPs in a Large SoC
Author(s):
PaperPresentation

User Paper 6: Connectivity-Based Constraints Generator (2nd Place - Best Paper)
Author(s): Xilinx Asia Pacific Pte Ltd
PaperPresentation

Frontend Design - Track II
User Paper 1: The Unfair Advantage of Hybrid Verification Strategy
Author(s): Future Technology Devices International Limited
PaperPresentation

User Paper 2: Mixed-Signals Data Paths Delay Match (3rd Place - Best Paper)
Author(s):
PaperPresentation

User Paper 3: Building Zero-Latency AHB Subsystem with CoreAssembler and DW Ips
Author(s):
PaperPresentation

User Paper 4: Novel Approaches to Integrate Floating Point in an Embedded System
Author(s):
PaperPresentation

User Paper 5: Comprehensive Methodology for Early Power Estimations and Effective Power Sign-off (1st Place - Best Paper)
Author(s): Infineon Technologies Asia Pacific Pte Ltd
PaperPresentation

User Paper 6: Power-Integrity Challenges During Scan-Test: A Case Study to Mitigate Electrical Challenges (2nd Place - Best Paper)
Author(s):
PaperPresentation

Publication Only
Publish Only
Adaptive UVM Virtual Sequencing for Efficient Functional Coverage Closure
Author(s): Imagination Technologies
Publish Only

FinFET-based Design Enablement Challenges and Solutions for Synopsys Digital Reference Flow
Author(s): GLOBALFOUNDRIES
Publish Only

Tutorials
Backend Design Track
Tutorial: IC Compiler II Technology
Author(s): Synopsys
Tutorial

Frontend Design - Track I
Tutorial: Getting the Most Out of Design Compiler
Author(s): Synopsys
Tutorial

Frontend Design - Track II
Tutorial: Advanced ECO in PrimeTime
Author(s): Synopsys
Tutorial

Tutorial Track
Tutorial: Handling Electro-Migration for Custom Design with FinFET Devices Using Custom Designer
Author(s): Synopsys
Tutorial

Tutorial: High-Performance, Energy Efficient Implementation of the ARM Cortex-A72 Processor Core in 16-nanometer FinFET Plus
Author(s): ARM; Synopsys
Tutorial

Tutorial: Low Power Verification Solution
Author(s): Synopsys
Tutorial

Tutorial: Verdi3 Automated Debug Platform : Siloti and Temporal Flow View (TFV)
Author(s): Synopsys
Tutorial
Silicon Valley 2017 Keynote

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