SNUG Singapore 2014 Proceedings

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Complete Proceedings


Speeches
Technology Keynote: Advanced EDA at Every Node
Author(s): Mr. Don Chan, Vice President, Corporate Applications Engineering, Design Group, Synopsys Inc.

User Papers and Presentations
Backend Design Track
User Paper 1: CMP Driven Lithography Design Optimization Using Synopsys ICC / ICV (2nd Place - Best Paper, Backend Design Track)
Author(s): GLOBALFOUNDRIES Singapore
PaperPresentation

User Paper 2: An Advanced Approach to Optimize Hierarchical Pin Assignment (3rd Place - Best Paper, Backend Design Track)
Author(s): MediaTek Singapore
PaperPresentation

User Paper 3: More than Waiver - Automating Regession of Design Rule Deck (1st Place - Best Paper, Backend Design Track)
Author(s): Altera Corporation
PaperPresentation

User Paper 4: Faster Timing Closure with Concurrent Clock and Data Optimization
Author(s): Lantiq Asia Pacific
PaperPresentation

User Paper 5: A Novel Strategy for Design Implementation of A High Speed Low Power SOC with 5 Million Instance Count
Author(s): MediaTek Singapore
PaperPresentation

User Paper 6: Continuous RX Standard Cell Placement Support in ICC for GLOBALFOUNDRIES 20nm & Below Technologies
Author(s): GLOBALFOUNDRIES Singapore
PaperPresentation

Frontend Design - Track I
User Paper 1: A Comprehensive Methodology for IDDQ Signoff
Author(s): Infineon Technologies Asia Pacific
PaperPresentation

User Paper 2: Minimizing Modifications Required for UMR Capim Addition
Author(s): Lantiq Asia Pacific
PaperPresentation

User Paper 3: Evaluation of ARC Processors Using Synopsys Tools
Author(s):
PaperPresentation

User Paper 4: Using Synopsys Asynchronous OCC IP to Target Cross Clock Domain Faults (3rd Place - Best Paper, Frontend Design Track)
Author(s): Lantiq Asia Pacific
PaperPresentation

User Paper 5: Hybrid and Shared Codec: A Case Study
Author(s): Lantiq Asia Pacific
PaperPresentation

Frontend Design - Track II
User Paper 1: Optimum Leakage Recovery using Synopsys PrimeTime ECO Leakage Recovery Flow (1st Place - Best Paper, Frontend Design Track)
Author(s): Altera Corporation
PaperPresentation

User Paper 2: Novel Retention Synchronizer Flip-Flop Translation Method in Synthesis Flow (3rd Place - Best Paper, Frontend Design Track)
Author(s):
PaperPresentation

User Paper 3: Innovative Clock-Domain Aware DFT Concept Based on Tetramax to Improve Timing Closure of Most Complex SoC Designs
Author(s): Lantiq Asia Pacific
PaperPresentation

User Paper 4: Single Static Timing Analysis Run for Multi Mode Peripherals in SoC Design (2nd Place - Best Paper, Frontend Design Track)
Author(s):
PaperPresentation

User Paper 5: SCAN Through SMS Memories
Author(s): Lantiq Asia Pacific
PaperPresentation

Publication Only
Augment Memory Design Predictability using Systematic Data Analysis on Memory Compiler Results
Author(s): Lantiq Asia Pacific
Publish Only

Automated Interface Timing Constraint Checkers
Author(s): eASIC
Publish Only

One-Die Signal Monitoring and Triggering Design and Implementation on FPGA
Author(s): School of Computing, Engineering and Information Science, KDU College
Publish Only

RTL Development Improvement Via RTL Exploration Synthesis Tool
Author(s):
Publish Only

Tutorials
AMS Design Track
Tutorial: Advance Layout Techniques in 16/14nm Designs
Author(s): Synopsys

Tutorial: Transistor Level Reliability Analysis in Advance Node Geometry Design
Author(s): Synopsys

Backend Design Track
Tutorial: IC Compiler II and the Power of 10x: A Product Walk-Through
Author(s): Synopsys

Frontend Design - Track I
Tutorial: Design Compiler 2013.12 Release Highlights
Author(s): Synopsys
Tutorial

Tutorial: DFTMAX Ultra
Author(s): Synopsys
Tutorial

Frontend Design - Track II
Tutorial: PrimeTime ECO - Now Physically Aware
Author(s): Synopsys
Tutorial

Tutorial: VC LP: Next-Generation Low-Power Static Verification
Author(s): Synopsys
Tutorial

Verification Track
Tutorial: Going Beyond the Waveform: Advance Debug Techniques in Verdi
Author(s): Synopsys
Tutorial

Tutorial: The "X" Factor: Address it in RTL Simulations
Author(s): Synopsys
Tutorial

Tutorial: VCS 2014.03 Release Highlights
Author(s): Synopsys
Presentation

Vision Session
Synopsys Verification Vision
Author(s): Mr. Ken Nelsen, Vice President, Applications Consulting, Global Technical Services, Synopsys Inc.
SNUG 2017 Keynote

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