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SNUG Israel 2016 Proceedings

2017 | 2016  |  2015  |  2014  |  2013  

Complete Proceedings

User Papers and Presentations
A4 Implementation with ICC & ICCII
A Novel Platform for Power Delivery Network Quality Verification of SoC Designs (Best Paper Award)
Author(s):
PaperPresentation
B1 Verification Methodology
Functional Coverage System: Convergence and Reuse Across Validation Platforms
Author(s):
PaperPresentation
B4 ECO
Full-Chip Mode of Work, While Using the PT-ECO Flow for Min Delay Fixing
Author(s):
PaperPresentation
B5 Circuit Simulation & Environment
Sub-Threshold Libraries Design and Characterization Using Synopsys SiliconSmart Tool (Technical Committee Award)
Author(s): Neil Feldman - PLSense
PaperPresentation
C1 Verification User Experience
A Linear Approach for Complex Constraint Structures
Author(s):
PaperPresentation

USB Verification
Author(s): Eran Rashkes - Veriest
PaperPresentation
C3 Static Check & Debugging
Using Static Checks in Automated Flows to Catch Reset Domain Crossings, A Growing Issue within Today’s Complex Designs
Author(s):
PaperPresentation

Verdi for RTL Design Debugging
Author(s):
Tutorial
C4 Signoff
STA in Multi-GHz Custom Circuits Made Easy with NanoTime (Technical Committee Award)
Author(s): Udi Nir - Toga
PaperPresentation
C5 Analog Mixed-Signal
Accelerate the Circuit and SRAM Simulations Using Synopsys FineSim and CustomSim
Author(s): Narkis Geuli, Yoav Rozenberg - Mellanox
PaperPresentation
C7 IoT Design
ASIC Bring Up and Advanced Debugging Techniques
Author(s): Gilad Fride - VocalZoom
PaperPresentation
Tutorials
A1 Verification Directions
Best Practices for Boosting Verification Performance
Author(s): Rafi Cohen - Synopsys
Tutorial
A2 Prototyping Direction
HAPS-80 and HAPS ProtoCompiler
Author(s): Yair Dahan - Synopsys
Tutorial

Synopsys Prototyping Direction
Author(s): Andrew Dauman - Synopsys
Tutorial
A3 Static Checks and Synthesis
Designer Tool Kit Overview
Author(s): Igal Zeevi - Synopsys
Tutorial
A4 Implementation with ICC & ICCII
IC Compiler II Delivers 10-20% Better Performance Power Area (PPA) On Advanced Designs
Author(s): Leon Rabinovich - Synopsys
Tutorial
A5 Custom Compiler and Flows
Custom Compiler Technology Walk-Through
Author(s): Uri Golan - Synopsys
Tutorial
A6 Automotive Overview
Synopsys Automotive Solutions
Author(s): Jeff Hutton - Synopsys
Tutorial
A7 IP Technology
Addressing PCI Express 4.0 Controller Design Challenges at 16GT/s
Author(s): Richard Solomon - Synopsys
Tutorial

Designing 7-nm IP, Bring It On Moore!
Author(s): Navraj Nandra - Synopsys
Tutorial
B1 Verification Methodology
Verdi - Key Techniques to Speed Up Debug
Author(s): Yoram Granit - Synopsys
Tutorial
B2 FPGA and Prototyping Design
Accelerate Your FPGA Design Schedules with Synplify Premier
Author(s): Paul Owens - Synopsys
Tutorial
B3 Low Power & DFT
Achieving High Test Quality with Synopsys Recommended ATPG Flow
Author(s): Evgneni Polyakov - Synopsys
Tutorial

Power Analysis Tools and Flows
Author(s): Avi Levi - Synopsys
Tutorial
B4 ECO
Formality Ultra
Author(s): Avi Braun - Synopsys
Tutorial

PrimeTime ECO
Author(s): Moshe Ashkenazi - Synopsys
Tutorial
B5 Circuit Simulation & Environment
Custom Compiler Simulation Analysis Environment Walk-Through
Author(s): Alon Sasson - Synopsys
Tutorial
B6 Design for Automotive
Accelerating the Path to a Safe and Secure SoC
Author(s): Fergus Casey - Synopsys
Tutorial

DesignWare® ARC EV Embedded Vision Processors
Author(s): Tom Michiels - Synopsys
Tutorial
B7 USB TypeC & PCIe 4.0
Performance-Efficient Implementation of Robust Header Compression (ROHC) Using an Application-Specific Processor
Author(s): Patrick Verbist - Synopsys
Tutorial

Successful SoC Implementation of USB Type-C and DisplayPort Alternate Mode
Author(s): Mick Posner - Synopsys
Tutorial
C2 Early Power Analysis
Applying UPF 3.0 for Early, System-Level Power Analysis of SoCs with Micron DDR Memories
Author(s): Ohad Amrami - Synopsys
Tutorial
C3 Static Check & Debugging
SpyGlass CDC and RDC - Clock and Reset Domain Crossing Verification
Author(s): Omri Margalit - Synopsys
Tutorial
C5 Analog Mixed-Signal
Circuit Simulators Update: HSPICE, FineSim SPICE, and Custom WaveView ADV for Signal Integrity, Analog Simulations, and Waveform Post-Processing
Author(s): Alon Sasson - Synopsys
Tutorial

CustomSim Updates for Circuit Simulation
Author(s): David Shaya - Synopsys
Tutorial
C6 Design for Automotive
Building Performance Into Next Generation Embedded Devices
Author(s): Noam Babayof - Synopsys
Tutorial

Reach ASIL Targets for Automotive Designs with Ethernet QoS IP and Certitude
Author(s): John Swanson - Synopsys
Tutorial
C7 IoT Design
IoT-Optimized IP: Balancing Processor Performance and Energy Consumption
Author(s): Fergus Casey - Synopsys
Tutorial
User Presentation
A5 Custom Compiler and Flows
TowerJazz Full Mix Mode Reference Design Flow Using Synopsys Custom Schematic, AMS and Layout Tools
Author(s): Ofer Tamir - TowerJazz
Presentation
B2 FPGA and Prototyping Design
Prototyping for WLAN Networking Devices
Author(s):
Presentation
C1 Verification User Experience
Qualification of SystemC Designs with Certitude
Author(s):
Presentation
C4 Signoff
HyperScale Qualification Experience
Author(s): Oshik Berkovitz, Yaar Keren - Broadcom
Presentation
SNUG ISRAEL 2019

Call for Papers Open
February 19, 2019

Silicon Valley 2017 Keynote

Dr. Peter Stone on “Learning and Multiagent Reasoning for Autonomous Robots”

Contact the SNUG Operations team for proceedings prior to 2013

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