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| Tutorials |
| A1 - Functional Verification & Prototyping |
Verify! Prototype! Go! A Comprehensive Solution to SoC Verification and Prototyping Challenges
Author(s): Ken Nelsen- Synopsys |
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| A3 - IC Compiler II |
IC Compiler II and the Power of 10x: A Product Walk-Through
Author(s): JC Lin, Mark Richards - Synopsys |
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| A5 - Analog and IP Development on FinFET |
Physical IP Development on FinFET - There's Nothing Planar About It!
Author(s): Jamil Kawa - Synopsys |
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| B1 - Emulation and Advanced Verdi Debugging |
Going Beyond the Waveform: Advanced Debug Techniques in Verdi
Author(s): Arnold Sher - Synopsys |
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Protocol Analyzer
Author(s): Shlomi Levy, Synopsys |
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Verification of SoC Designs with ZeBu HW Emulator
Author(s): Ory Shelef - Synopsys |
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| B2 - Hybrid Prototyping |
Practical Virtual Prototyping - Architecture and Software Development
Author(s): Ohad Amrami - Synopsys |
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| B3 - Advanced Front–End Design and Updates |
Design Compiler 2013.12 Release Highlights
Author(s): Gal Hason - Synopsys |
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| B4 - Low Power Design |
Hierarchical Flow With Block Abstraction and Power Domains
Author(s): Pavel Vilk - Avnet |
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Low Power Flow (UPF) Update
Author(s): Eyal Odiz - Synopsys |
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Verdi Signoff-LP: Next-Generation Low-Power Static Verification
Author(s): Ziv Leshem - Synopsys |
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| B5 - Analog Mixed-Signal Design Experience and Updates |
Low-Power and Simulation Performance in Mixed-Signal
Author(s): Dr. Isaac Zafrany -Synopsys |
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| B6 - USB 3.1 and Multi-Protocol High Speed PHY Tutorials |
Addressing the Challenges of Multi-Protocol High Speed SERDES PHY Design
Author(s): Robert Fulton - Synopsys |
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Integrating USB 3.1 in Your Next SoC Design
Author(s): Didier Leclercq - Synopsys |
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| B7 - Application-Specific Processors and DSPs |
Application-Specific Processors and DSPs Provide Options to Enhance SOC Designs Performance and Energy Characteristics.
Author(s): Werner Geurts - Synopsys |
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| C2 - Fast Prototyping |
Better, Faster, Sooner: Tips and Tricks to Efficiently Achieve Timing Performance Goal
Author(s): Yair Dahan - Synopsys |
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Putting IP and Subsystem Prototyping on the Fast Track
Author(s): Mick Posner - Synopsys |
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| C3 - Solutions For Complex Implementation Challenges |
Analyzing Clock Mesh Circuits Using Analog Simulator
Author(s): Moshe Ashkenazi, Alon Sasson - Synopsys |
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Emerging Nodes Design With IC Compiler
Author(s): Leon Rabinovich - Synopsys |
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Routing DDR PHY Matched Length Signals Using Galaxy Custom Router
Author(s): Maor Aharon - Synopsys |
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| C4 - Signoff and ECOs |
ECO Implementation Assistance and Advanced Debugging Using Formality Ultra
Author(s): Shaul Ben-Dor - Synopsys |
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PrimeTime ECO - Now Physically Aware
Author(s): Evgeni Liberman - Synopsys |
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| C5 - Custom Design and Flows for Mixed Analog/Digital Chips |
Circuit Simulator Release Update: The Solution for Tomorrow's Challenge
Author(s): Dr. Isaac Zafrany -Synopsys |
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| C6 - DDR4 and MIPI Tutorials |
Faster DRAM: What You Need to Know About LPDDR4-3200, DDR4-3200, and Next-Generation DRAM
Author(s): Marc Greenberg - Synopsys |
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MIPI In Mobile Applications: Reducing Power with M-PHY, M-PCIe and USB SSIC
Author(s): Michael Chen- Synopsys |
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| C7 - IoT and ARC Processors |
High Speed Processing on an Embedded Budget
Author(s): Michael Thompson - Synopsys |
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Ultra-Low Power Processors and Subsystems for IoT
Author(s): Michael Thompson, Shlomi Dan - Synopsys |
