Imagination: Collaborating to Optimize Design Solutions

Imagination Summit 2015

Imagination is hosting a day-long series of presentations, demonstrations and deep-dive interactive sessions with top executives from Imagination along with technology overviews from its key partners. Synopsys is a key sponsor of the Imagination Summit 2015 series and will share how the two companies are collaborating to optimize design solutions for Imagination-based SoCs in the following areas:

  • Chip implementation redefined:
    IC Compiler™II place and route with the power of 10X
  • Accelerate SoC verification and early software bring-up:
    Up to 6 MHz ZeBu® emulation performance
  • Optimize 40nm to 16nm CPU, GPU and DSPs:
    HPC Design Kit – standard cells & memories
  • Speed hardware/software integration:
    Up to 24 MHz HAPS® FPGA-based prototype performance

Synopsys will be featured in the following technology presentations:

  • Collaborating to Speed Design and Verification with Optimized PPA
    Presenter: Phil Dworsky, Director, Strategic Alliances, Synopsys
  • Hardening Imagination’s 16FF+ PowerVR Series 7 GPU for Performance & Power with DesignWare HPC Design Kit
    Presenter: Phil Dworsky, Director, Strategic Alliances, Synopsys

During the breaks scheduled throughout the day, plan on seeing the Synopsys booth in the partner exhibit area. Featured demos will illustrate the collaborative solutions between Synopsys and Imagination for Imagination-based SoCs. Supporting that theme will be our IC Compiler™ II place and route product, ZeBu® emulator, HPC Design Kit and HAPS FPGA-based prototyping Solution.