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Synopsys Verification IP for NVM Express (NVMe)

The Synopsys Non-Volatile Memory Express (NVMe) VIP is designed to help thoroughly verify NVMe designs using both random and directed simulation. The NVMe verification IP (VIP) adds an application interface to the Synopsys PCI Express VIP. The NVMe VIP requires the Synopsys PCI Express SVC datasheet. The VIP is implemented to be verification methodology neutral, and can be integrated with and controlled by any hardware verification language such as SystemVerilog (including UVM), C/C++, and Verilog. It runs on all popular simulators.

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