Verification White Paper Download
Early, Accurate, Signoff-Correlated Power Analysis
Power estimation has always been a fundamental part of semiconductor development, but it has grown in importance in recent years. Virtually every application domain has power limitations that must be satisfied before a chip is fabricated. There is no effective way to fix power issues in the lab or in the field, so pre-silicon estimation must be accurate. The short development cycles for many types of products demand power estimation techniques that occur early in the projects and can be run repeatedly with minimal turnaround time. This white paper discusses the shortfalls of traditional power analysis and presents a new approach to “shift left” the estimation process while retaining a high degree of accuracy.
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