Today's ASIC IP and SoC design teams face the dual challenge of very short delivery schedules and high risk of their product being rejected by the market if chip designs ship with defects. Synopsys' FPGA-based prototyping solution enables a more parallel hardware/software development strategy where software developers, validation engineers, and system integration experts have access to prototypes running at near real time speed months before tape-out of new ASIC silicon. FPGA-based prototypes are ideal for pre-silicon software development, system validation, and hardware/software integration of ASIC IP and SoC designs. Prototyping teams benefit from an easy-to-use flow from ASIC RTL to the FPGA-based prototype, high debug visibility, and a scalable hardware architecture to support and streamline IP and SoC system level validation. Synopsys' High-Performance ASIC Prototyping System HAPS®-70 with Symmetrical System Architecture (SSA) offers the best system performance, reliability, and design automation in the industry.