In this session STMicroelectronics shares its approach to delivering optimized energy efficient solutions for the SoC market. Starting with an overview of the Fully Depleted Silicon On Insulator (FD-SOI) process technology as an enabler for high performance / low power design, the session will focus on ST's low power architecture for the latest ARM® processors - Cortex®-A57 and -A53. Highlights from the low power implementation and verification methodology developed with Synopsys, including results and best practices, will also be presented. The session will conclude with a preview of ST's process technology and ARM-core based SoC product roadmap.
Senior Principal Engineer
Design & Architecture for Energy Efficiency
CPU & GPU subsystems Technology R&D
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