ARC Processor Summit Proceedings

Presentation - Optimized Linux for ARC HS38 Multicore Processors

The ARC HS38 processor is based on the highly-efficient ARCv2 instruction set architecture (ISA) and pipeline that delivers the high degree of power-performance efficiency and code density required of embedded applications running Linux. The processor has a full-featured Memory Management Unit (MMU) supporting a 40-bit physical address space and page sizes up to 16 megabytes (MBs), giving designers the ability to directly address a terabyte of memory with faster data access and higher system performance. This session will provide insights on how the advanced hardware features of the HS Processor are exploited in the GNU toolchain and Linux kernel to maximize Linux application performance and efficiency in both single core and multi-core (SMP) configurations.
Vineet Gupta, Software Engineer, Synopsys

Thank you for your interest in the presentations from the event.

Please complete the registration form and click the 'continue >>' button below.

Required Required Fields

Business Email:Required
First Name:Required
Last Name:Required
Phone:Required
Job Title:Required
Company:Required
Country/Region:Required
Address:Required
City:Required
State/Province:
Optional
Postal/Zip Code:Required