In a highly competitive semiconductor market, it is increasingly important to be able to quickly and easily differentiate your device. This session will introduce ARC Processor EXtension (APEX) technology, which can be used to extend the instructions and register set of the CPU as well as add tightly coupled peripherals and custom interfaces to the core. It will also include real-world examples and recent additions to optimize performance for complex extensions while retaining a simplified interface.
Joep Boonstra, Sr. Staff Architect, Synopsys
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