Random Variability in Transistors and SRAM: Measurement, Analysis, and Improvement
We have fabricated and measured large scale device-matrix-array (DMA) TEG of 1M transistors and 16k SRAM cells. The origins of random variability in transistors have been analyzed and its suppression methods have been pursued. In the first half of the talk, the origins of random variability in Vth and drain current are discussed based on measured data and simulation. In the second half, the relationship between measured static noise margin (SNM) and Vth of individual transistor in SRAM cells is discussed using DMA SRAM TEG.
Dr. Toshiro Hiramoto, University of Tokyo