DAC 2013 Verification Panel: SoC Leaders Verify with Synopsys 

SoC Leaders Verify with Synopsys

On June 4, 2013, Synopsys hosted a luncheon event at DAC in Austin, Texas. Industry leaders, such as Altera, ARM, Freescale, Qualcomm and STMicroelectronics shared their views on what's driving SoC complexity and how their teams have achieved success. They also discussed the latest developments in verification.


SoC Leaders Verify with Synopsys
John Chilton, Senior Vice President of Marketing

Next-Generation FPGAs Driving SoC-Like Verification Challenges... This isn't your old FPGA
Sheela Pillai, Director of Verification

Verification Collaborations Enabling ARM-based SoCs
Paul Martin, Senior Product Manager

RTL Power Aware Verification on ARM Cores Sub-Systems
Massimo Calligaro, Senior Verification Specialist

Reducing Verification Turnaround Time for Complex SoCs
Amol Bhinge, Senior SoC Verification Manager

Verification of Complex SoCs
Chinh Tran, Senior Director of Engineering

DAC 2013 Verification Lunch Panel

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