OCP Verification IP 

Synopsys Verification IP (VIP) for OCP provides a quick and efficient way to functionally verify OCP 2.0/2.1/2.2 interfaces. The OCP verification IP enables the verification f master and slave devices in OCP systems and cores and provides 100% functional coverage as defined in the "Functional Coverage" chapter 16 of the OCP 2.0 functional specification. The Synopsys VIP for OCP supports the Verification Methodology Manual for SystemVerilog (VMM). The VMM defines a coverage driven methodology for SystemVerilog using a constrained random environment.

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Figure 1
Figure 1: Example block diagram including Synopsys VIP for OCP

Primary Features
  • Supports the full range of OCP configurations
  • Supports Multi-Threading and Bursts
  • Supports configuration as core or system
  • Supports 2.1 tagging
  • Supports 2.2 Threadbusy Pipelined
  • Supports 2-dimensional block burst sequences
  • Non-blocking flow control options
  • Includes example system testbench with predefined test sequences and scenario generators to provide functional coverage of OCP 2.0/2.1
  • Supports randomized stimulus generation and configuration
  • Generates logs and reports to observe OCP transactions
  • Supports UBM, OVM and VMM testbenches
  • Supports all major simulators

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