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A View from the Top: A System-Level Blog
This blog will deal not only with the shift towards adoption of virtual platforms but with ESL technologies in general.
Achim Nohl

Analog Insights Blog: Analog/Mixed-Signal Design and Verification
Observations and views from 3 of Synopsys’ top AMS/custom design technologists.
Fred Sendig, Kishore Singhal, Bob Lefferts

The Standards Game
Hello, everyone interested in EDA interoperability and fans of The Standards Game. I’d like to invite you to join me at the 21st Synopsys EDA Interoperability Forum, sponsored by Sun Microsystems.
Karen Bartleson

Verification Martial Arts
In SystemVerilog, unlike C, you don’t have to explictly free dynamically allocated class instances. Like most modern programming languages, SystemVerilog includes a garbage collector that frees memory that is no longer needed.
Janick Bergeron, Design Entomologist

On Verification- Software-to-Silicon
About a year ago, Synopsys announced a corporate initiative to take advantage of multicore processor technology across its broad tool portfolio. On the verification front, the first tool out of the multicore gate was HSPICE, with impressive performance gains.
Tom Borgstrom

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