Custom Compiler™ is Synopsys' full-custom solution that features the pioneering visually-assisted automation flow that speeds up custom design tasks, reduces iterations and enables reuse. Tuned for rapid implementation of FinFET custom designs, it shortens the time it takes to complete FinFET custom design tasks from days to hours. Its visually-assisted automation flow leverages the graphical use model familiar to layout designers while eliminating the need to write complicated code and constraints.
The visually-assisted automation flow in Custom Compiler is based on four types of Assistants: Layout, In-Design, Template and Co-Design. With Custom Compiler, routine and repetitive tasks are dealt with automatically without extra setup and the intuitive menu structure ensures a minimal learning curve for experienced layout engineers. Custom Compiler provides an open environment spanning schematic, simulation analysis and layout. Unified with Synopsys' circuit simulation, physical verification and digital implementation tools, Custom Compiler provides a comprehensive custom design solution.
Custom Compiler Data Sheet (PDF)
Custom Compiler Video
Introduction to Custom Compiler
Antun Domic, Executive VP and GM of the Design Group unveils Synopsys' next-generation custom design solution.
Custom Compiler brings new levels of productivity to FinFET layout by employing visually-assisted automation technologies that speed up common design tasks, reduce iterations, and enable reuse.
Custom Compiler Webinar
Custom Compiler is ideally suited to tackle tough advanced-node design challenges. View the webinar to learn more about the features and capabilities of Custom Compiler's visually-assisted automation technologies.
- Template Assistants help designers reuse existing custom layout know-how
- In-Design Assistants reduce iterations with native design rule checks and parasitic extraction
- Layout Assistants speed up layout tasks with user-guided placement and routing
- Co-Design Assistants unify custom and digital flow to accelerate mixed-signal IC design