Galaxy Custom Designer Mini Demos    

Galaxy Custom Designer® leverages Synopsys' Galaxy™ Implementation Platform to provide a unified solution for custom and digital designs, thereby enhancing system-on-chip (SoC) design efficiency and productivity. Built from the ground up, Custom Designer was architected for productivity. It is the first-ever custom implementation solution built on an open architecture supporting interoperable process design kits (PDKs) from leading foundries. Custom Designer delivers unmatched productivity with a common use model for simulation, analysis, parasitic extraction and physical verification.

Synopsys has prepared a series of Mini Demos highlighting the unique features of the Custom Designer tool suite that help make custom/AMS design faster, easier, and more intuitive.

Mini Demo: EM/R Constraint Driven Editing and Analysis
EM/R constraint-driven editing and analysis helps automate the creation and editing of nets that must meet stringent EM/R requirements found in many of today’s high-speed SoCs. This capability is part of the IC Compiler Custom Co-Design solution that enables seamless full-custom editing between IC Compiler™ and Galaxy Custom Designer®.

Mini Demo: Advances in AMS Co-Design with IC Compiler
The seamless integration between IC Compiler and Galaxy Custom Designer accelerates the SoC design cycle by enabling quick and reliable custom edits to IC Compiler designs at any stage of development.

CustomExplorer Ultra: Mixed-signal Regression Management and Debug Environment
CustomExplorer Ultra  is a comprehensive regression management and debug environment  for mixed-signal SoC verification. Tightly integrated with Synopsys’ CustomSim simulator and CustomSim/VCS co-simulation solution, CustomExplorer Ultra aids engineers in rapidly performing customized advanced analyses for transistor-level analog, mixed-signal and SoC designs.

Mini Demo: Interactive Auto-Router
Custom Designer's Interactive Auto-Router is an innovative feature that improves single-net routing productivity. It comes in two modes of operation: Point-to-Point (P2P) and Follow-the-Cursor (FTC) routing. Both P2P and FTC will follow the preferred layer routing direction while routing nets LVS and DRC correct in real-time.

Mini Demo: Productive DRC Debugging with IC Validator and Custom Designer
IC Validator's error classification capability provides layout designers and CAD engineers the ability to classify and comment individual DRC error markers according to their root cause. IC Validator runs can read these classified errors into a GUI, allowing users to track the previously-classified violations within the Custom Designer cockpit.

CD MiniDemo: Advances in Schematic Capture Featuring the Custom Designer Schematic Editor

Mini Demo: Advances in Schematic Capture Featuring the Custom Designer Schematic Editor
Custom Designer SE’s schematic entry system enables designers to be more productive in meeting the design challenges of today’s complex circuits.

This mini demo shows how, with little or no learning curve, all Custom Designer’s schematic editing tasks are accomplished with fewer clicks, quicker menu access and less pop-up menu clutter, thereby maximizing productivity.

Mini Demo: SmartDRD Technology

Mini Demo: SmartDRD Technology
SmartDRD is a new, innovative technology built into Galaxy Custom Designer LE for interactive DRC violation visualization, detection and correction.

This mini demo shows how the DRDAutoFix feature automatically detects and corrects DRC violations in a fraction of a second.

The DRDAutoFix feature provides a powerful productivity boost by automating the task of repairing DRC violations, which can take as much as 40% of the overall layout design cycle time when done manually.



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