|Nov 06, 2013||Design & Reuse to Host TLMCentral Web Portal|
Synopsys’ Transfer of TLMCentral to Design & Reuse IP Portal Enables Easy Search of More Than 1000 IP Models to Speed SoC Software Development
|Sep 26, 2013||Latest Synopsys Virtualizer Release Accelerates Creation and Deployment of VDKs for Software Development|
|May 23, 2013||Synopsys Delivers VDK for Renesas RH850 MCUs|
Joint Center of Excellence Produces Virtualizer Development Kit (VDK) Enabling Early Software Development, System Integration and Test for RH850-based Automotive Designs
|Apr 29, 2013||Synopsys Announces Virtualizer Development Kit (VDK) for Freescale’s Qorivva MCU Family|
New VDK Enables Automotive Suppliers and OEMs to Start Software Development in Prior to ECU Board Availability
|Feb 11, 2013||Synopsys Signs Multiyear Collaboration Agreement with ARM for Early Software Development of ARMv8 Processors|
New Virtualizer Development Kits for ARMv8 Processors Enable Early Software Development Up To One Year in Advance of Silicon
|Jul 30, 2012||Synopsys Collaborates with Renesas to Advance Software Development Solutions for Automotive Applications|
Joint Engineering Team Will Develop Virtual Prototypes to Speed Software Debug and System Testing for Renesas' RH850 Microcontroller-Based Designs
|Jul 23, 2012||Latest Synopsys Virtualizer Release Speeds Virtual Prototype Creation by Up to 3X|
New Modeling Interface and Automation Features Increase Modeling Productivity to Enable Earlier Start of Software Development
|Jun 26, 2012||Synopsys' Virtualizer Speeds Software Development and Enhances Design Enablement for Systems Based on the Infineon AURIX Microcontroller Family|
AURIX Virtual Prototype Enabled Automotive Software Developers to Start 12 Months Before Silicon Availability
|Mar 21, 2012||Synopsys Unveils Virtualizer Development Kits to Accelerate Software Development for ARM big.LITTLE Processing|
VDK Family Delivers Fast Software Bring-Up and Better Debug Control for Quad-Core ARM® Cortex™-A15 MPCore™ Processor and ARM big.LITTLE™ Processing-Based Designs
|Oct 12, 2011||Altera Embeds Synopsys’ Virtual Prototyping Technology in New ARM-based SoC FPGA Offering|
|Sep 29, 2011||First Industry-Wide Web Portal for Transaction-Level Model Access Welcomes Model Developers and Users |
Synopsys announced the launch of TLMCentral (link TLMCentral to www.tlmcentral.com, if possible) the first
industry-wide web portal for developers and users of transaction-level model (TLM) technology. TLMCentral
aggregates information about free and commercial system-level models of common system-on-chip (SoC) components
from leading semiconductor IP vendors, tool providers, service companies and universities. TLMCentral is an open
portal that will ease and accelerate the development of virtual prototypes across the industry. It is available
at no cost to users and providers of transaction-level models.
|Sep 29, 2011||ARM and Synopsys Sign ARM Cortex Processor Models Agreement|
Synopsys and ARM® announced a licensing agreement enabling Synopsys to distribute ARM's Fast Models and create models of ARM Cortex Series processors.
|Jul 19, 2011||Synopsys Introduces Virtualizer Next-Generation Virtual Prototyping Solution|
Virtualizer Accelerates Software Development Schedules By Up To Nine Months with Lower Engineering Effort
|Feb 07, 2011||Synopsys Announces New Technology for Optimizing Multicore Systems|
Synopsys announced the broad availability of Platform Architect with Multicore Optimization Technology, a new solution for performance analysis and early definition of multicore system architectures in SystemC. Using Platform Architect with Multicore Optimization Technology, designers of SoCs, chipsets and systems can capture hardware/software performance models of multicore system architectures in the early concept phase for robust performance measurement and trade-off analysis, months prior to software availability.
|Jan 11, 2011||Mazda Adopts Synopsys’ Virtual Prototyping Solution for Electronic Control Unit Verification|
Synopsys announced that Mazda Motor Corporation, a leading producer of automobiles, has adopted Synopsys CoMET-METeor virtual prototyping solution to verify their Electronic Control Units (ECUs). Over the last year, Mazda has been using the METeor embedded software development environment to conduct its ECU system verification in a virtual environment. By decreasing the number of tests on real automobiles and hardware-in-the-loop (HILS) test equipment, the virtual prototyping solution will enable Mazda to save significant time and cost.
|Mar 23, 2010||Synopsys completes the Acquisition of CoWare|
Synopsys has completed the acquisition of CoWare, Inc., a global supplier of software and services for electronic systems design. The acquisition will expand Synopsys' portfolio of system-level design and verification products used in wireless, consumer and automotive design.
|Feb 02, 2010||Synopsys Acquires VaST Systems Technology Corporation|
Synopsys announced it has acquired VaST Systems Technology Corporation to extend its virtual prototyping solutions into the automotive and consumer application space. The acquisition adds a comprehensive set of processor sub-system models frequently found in automotive and consumer applications to Synopsys' virtual prototyping portfolio.
|Jan 12, 2010||Synopsys Introduces Industry’s First SystemC TLM-2.0 SuperSpeed USB 3.0 Models|
Synopsys announced the availability of SuperSpeed USB 3.0 transaction-level models (TLM) supporting the Open SystemC™ Initiative (OSCI) TLM-2.0 API specification. The models are TLM representations of the Synopsys DesignWare® SuperSpeed USB 3.0 Device and xHCI Host Controller IP.
|Jul 27, 2009||Leading EDA Companies Join New ARM Fast Models Enablement Program|
ARM today announced at DAC, San Francisco, Calif., that CoWare, Mentor Graphics and Synopsys Inc. have joined the ARM® Fast Models Enablement Program.
|Jun 08, 2009||Synopsys Enables System Design Interoperability with System-Level Catalyst Program|
Synopsys today announced its System-Level Catalyst Program to accelerate the adoption of system-level design and verification.
|Nov 24, 2008||JEDA Launches The First Commercial TLM2.0 Compliance Checker|
JEDA Technologies announced today the availability of its TLM-2.0 Compliance Checker for high-level SystemC models. The product targets high-level OSCI TLM-2.0 model developers and OSCI TLM-2.0 compliant Virtual Platform users. The checker reduces high-level SystemC model development time and ensures interoperability with OSCI TLM-2.0 models coming from various sources.
|Jun 09, 2008||Synopsys Supports OSCI SystemC TLM-2.0|
Synopsys today announced support for the newly ratified Open SystemC Initiative (OSCI) SystemC™ TLM-2.0 standard in its Innovator and DesignWare® System-Level Library products.
|Jun 02, 2008||Synopsys at Freescale Technology Forum|
Synopsys will highlight its complete virtual platform solutions and DesignWare® System-Level Library at the Freescale Technology Forum (FTF) in Orlando, Florida on June 16 - June 18, 2008.
|May 15, 2008||Synopsys Adds 30 New Titles to DesignWare System-Level Library|
Synopsys today announced the immediate availability of 30 new titles in the DesignWare® System-Level Library.