|Leveraging Synopsys’ Lynx Design System for SoC Designs on Advanced Nodes|
Learn how Lynx Design System can help accelerate SoC design exploration, implementation, analysis and reporting on advanced process technology nodes.
Oct 04, 2015
|Flow Exploration Key to FinFET Network Processor Implementation|
ARM®, Samsung and Synopsys at 2015 Design Automation Conference discuss how the Lynx Design System with IC Compiler II helped them explore multiple approaches to the implementation of a complex SoC over just four weeks.
Aug 06, 2015
|Using Standardized Design Flows to Cut Time to Tape-out – and Speed Design-Flow Evolution|
Learn how Altera is leveraging the Lynx Design System in their next generation design flow to lower risk and improve schedule predictability.
Jul 25, 2014
|DDR Hardening Demystified|
Meet your design requirements when integrating complex DDR memory interfaces by analyzing and fine-tuning the design parameters through an automated hardening flow that iteratively refines the implementation.
Jul 11, 2014
|Accelerating Multi-Corner Multi-Mode Sign-off Using the Lynx Design System|
Learn how mixed-signal chip designer Semtech accelerated multi-corner multi-mode sign-off using the Lynx Design System
Apr 22, 2014
|Accelerating process migration in advanced ASIC design at Bull|
Learn how high performance computing systems company Bull used Synopsys’ Lynx Design System to standardize its flow and simplify process migration to the next node.
Sep 24, 2013
|Hierarchical physical design - issues and methodologies|
In this paper, we will examine some of the issues and methodologies encountered during the finishing and physical signoff stages, and discuss how some of the risks can be mitigated by forward planning and careful data management based on successful experiences of Synopsys Professional Services design consultants implementing large designs. We will also look at additional methods that can be used to give a high degree of confidence in the integrity and manufacturability of a large hierarchical design.
Jul 12, 2013
|Enabling greater productivity and schedule predictability in IC design|
The semiconductor industry is a hard taskmaster. The basic rule is that the next generation of a chip design will be more complex than the last, and yet should be delivered at least as quickly, if not quicker, without compromising performance or power consumption.
Jun 05, 2013
|Improving Compute Farm Efficiency for EDA|
Neel Desai, product marketing manager, Lynx Design System, explains how new technology can improve EDA runtimes by helping design teams make better use of their available compute resources and potentially delay expensive hardware upgrades.
Synopsys Journal, Issue 4 2012
Dec 01, 2012
Glenn Dukes, Vice President of Synopsys Professional Services, suggests that the right combination of program management expertise, infrastructure support and soft skills enables design teams to reap the growth benefits of global design.
Synopsys Journal, Issue 1 2012
Apr 01, 2012
|How Is Your IC Design Flow Glued Together? |
Most IC designers I talk to really enjoy the creative process of developing a new SoC design, debugging it, then watching it go into production...Fortunately for Synopsys tool users there is now a short-cut offered in the form of the Lynx Design System, which has already captured the digital design flow so you can focus on design instead of CAD integration.
Jan 25, 2012
|Visualization for Chip Design|
This article describes some of the capabilities required of a design visualization tool. While it uses Synopsys' Lynx Design System to make the examples more concrete, the principles and benefits described apply generally to visualization tools and techniques in the broader context.
Dec 07, 2010
|IBM's 'Fab Club' Enters High-K Era|
Getting a jump on its rivals, IBM Corp.'s ''fab club'' and others have made good on their previous promises. The group, including ARM, IBM, Samsung Electronics, GlobalFoundries and Synopsys, have announced the delivery of its 32-/28-nm process and design platform, based on high-k and metal gates.
Jun 14, 2010
|Synopsys Shows Off Optimized Lynx Design For 32/28nm Technology|
Synopsys has announced that its Lynx Design System has provided the platform to reduce risk and total development cost for advanced 32/28nm system-on-chip (SoC) designs.
Jun 14, 2010
|Semi ecosystem collaboration more critical than ever|
With the industry still recovering from the recession, design tool and methodology innovation is continuing to shift to tight collaboration between semiconductor companies, EDA vendors, and foundries.
Mar 02, 2010
|As design goes global, tools get more critical|
Disaggregation of the IC and system design chain toward a specialty model has included a growing reliance on outsourcing. That has created an opportunity for developers of advanced tool suites to field design environments in which the "best of the best"--from anywhere around the globe--can be assembled for round-the-clock development of fully optimized designs
Aug 10, 2009
|Insight Magazine: Building Productive and Predictable Design Flows|
Neel Desai, product marketing manager, Synopsys, outlines Synopsys’ Lynx Design System, a production-ready design environment for faster, reduced-risk chip development.
Jul 03, 2009
|Chip Design: Going Graphical to Better Manage Design Schedules|
In the course of the design and analysis of a typical 65 nanometer (nm) systems-on-chip (SoC) project, it’s not uncommon to generate more than two to three terabytes of data for even moderately-sized designs.
May 01, 2009
|Electronic Design: IC development platform integrates proven tools, best practices|
The economy has put IC design houses in a severe bind. Even as getting new products to market on time becomes more critical than ever, most design projects run late. This owes largely to the fact that system-on-a-chip (SoC) design complexity, in gate-count terms, grows at a rate of 20% or more per year. Further impacting the design complexity growth is the need to incorporate a growing roster of power-management circuitry.
Apr 20, 2009
|Gabe on EDA: Software-as-a-service in EDA – Can Lynx help?|
Gary Smith has published a short research paper authored by Sharon Tan that explores one possible avenue to increase EDA revenue by expanding the service aspect of the business.
Mar 30, 2009
|EETimes: De Geus touts new products, says ICs will rebound|
Delivering the keynote address at a user group event here Monday (March 16), Aart de Geus, chairman and CEO of Synopsys Inc., touted the company’s new products and said the semiconductor industry would remain critical to the world after emerging from a recession expected to be long and deep.
Mar 17, 2009
|EDA DesignLine: Synopsys releases Lynx to manage IC design|
Synopsys is making available an automated chip development environment that the company says combines an RTL-to-GDSII design flow with productivity-enhancing features to accelerate chip development while mitigating the risks of designing at new process nodes.
Mar 16, 2009
|EDN: Synopsys Lynx updates Pilot approach to managing an IC design flow|
Synopsys today unveiled Lynx, a package of software intended to help automate the execution, oversight, and management of chip design flows. Like its predecessor Pilot, Lynx is not a design tool or a flow, but a package of recommended flow, database, supervisory tools and services intended to improve productivity—and by the way, make it easy to decide on a turnkey all-Synopsys tool set.
Mar 16, 2009