Standards 

 

Synopsys continues to champion customers' requirements for interoperability. Interoperability is at the heart of Synopsys' solutions, design platforms, tools, and IP.

IEEE 1801 (UPF): Addressing dynamic or leakage-based power consumption requires new techniques and standards that fall outside the scope of traditional HDL-based flows. The IEEE 1801 standard, based on Accellera’s Unified Power Format (UPF), allows designers to describe low power design intent and improve the way complex integrated circuits can be designed, verified and implemented. This world-wide open standard for low power from IEEE permits all EDA tool providers to implement advanced tool features that enable the design of low-power ICs. Starting at the Register Transfer Level (RTL) and progressing into the detailed levels of implementation and verification, UPF facilitates an interoperable, multi-vendor tool flow and ensures consistency throughout the design process.

VMM-LP: IC design verification has become simultaneously complex and critical. The VMM methodology, defined in the book Verification Methodology Manual for SystemVerilog, provides proven industry best practices developed since 2005. In response to the increasing need for targeted verification of low-power IC designs, the book Verification Methodology Manual for Low Power Design (VMM-LP) is also available. It addresses all aspects of functional verification for designs employing power management strategies and techniques. Synopsys’ corresponding implementation of the VMM-LP base class library is also freely available as an open standard under Apache 2.0 open source licensing from www.vmmcentral.org.

Verification Methodology Manual

LPMM: The "Low Power Methodology Manual" (LPMM) is a comprehensive and practical guide to managing power in system-on-chip designs, critical to designers using 90-nanometer and below technology. Combining extensive commercial experience, deep scientific understanding, silicon technology case studies, and a pragmatic approach, the authors describe design techniques which address both dynamic and static (leakage) power, including methods for power gating and dynamic voltage and frequency scaling. For each topic, the authors describe the design challenge, provide a technology foundation, and then make specific recommendations as well as a caution against design pitfalls. This book is a must-read for anyone designing, or getting ready to design, SOC's for low power applications.

Low Power Methodology Manual



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