DesignWare IP White Papers 

Rapid Architectural Exploration in Designing Application-Specific Processors
Today’s SoCs demand increasing performance with high energy efficiency, but yet require flexibility to address late specification changes, post-silicon modifications and product derivatives. ASIPs close the gap between highly optimized fixed-hardware data path implementations and standard processor IP, and efficient architectural exploration is at the heart of any ASIP design process. Designers need to rapidly explore the impact of different architectural choices on power consumption and performance, ideally using real-world application C-code as part of the design flow. This white paper explains the architectural tradeoffs that are available to an ASIP designer, how to trade off performance vs. area, and why an ASIP design can still maintain full C-programmability while being optimized for a certain application domain. We will illustrate the architectural exploration approach using a simple yet representative example.
Bo Wu, Technical Marketing Manager, Synopsys; Markus Willems, Product Marketing Manager, Synopsys

Ethernet in the Connected World
This white paper outlines the latest networking trends across some of the key market sectors including automotive, the connected home and data centers, and explains how Ethernet is relevant to each. It also explains how Synopsys responds to its customers’ needs to develop and offer configurable semiconductor IP that enables system-on-chip (SoC) design teams to quickly and reliably implement Ethernet-based digital controllers and physical layers.
John A. Swanson, Ethernet Product Line Manager, Synopsys

Addressing IP Integration & Software Development Challenges to Accelerate SoC Time-to-Market
This white paper will explore the issues facing SoC designers as they address SoC complexity and time-to-market challenges. It will discuss the use of third-party IP while noting that high-quality IP alone is not enough to accelerate time-to-market with today’s SoC complexity. The paper will also discuss issues around driver software development for the IP. Finally, it will review the five major development steps in any SoC design and how third-party IP providers should be expected to help accelerate each of these steps.
Dr. Johannes Stahl, Director of Prototyping Product Marketing, Synopsys, Inc.

Real-Time Trace: A Better Way to Debug Embedded Applications
Firmware and application software development is often the critical path for many embedded designs. Problems that appear in the late phases of the development can be extremely difficult to track down and debug, thus putting project schedules at risk. Traditional debug techniques cannot always help to localize the issue. This whitepaper shows the benefits of debugging with ‘real-time trace’ hardware assistance, including how it can vastly reduce the amount of time needed to track down problems in the code, and introduces other benefits, such as hot-spot profiling and code coverage, offered by real-time trace systems.
James Campbell, CAE, Synopsys, Inc.; Valeriy Kazantsev, CAE, Synopsys, Inc.; Hugh O’Keefe, Engineering Director, Ashling Microsystems

 

 


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