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Mar 16, 2015Baikal Electronics Selects Synopsys Solutions to Accelerate the Design and Verification of Their Advanced SoCs
Solutions Include DesignWare IP, Platform Architect, Galaxy Design Platform and Functional Verification

Mar 12, 2015Synopsys and Hardent Provide Interoperable Display IP Solutions to Reduce Data Transmission Bandwidth for Ultra High-Definition Mobile Devices
Combination of Synopsys DesignWare MIPI DSI IP and Hardent VESA Display Stream Compression IP Enables Single and Dual High-Definition Displays

Mar 12, 2015Synopsys' New Verification IP for MIPI SoundWire Enables Audio and Control Interfaces in Low Power Designs
Native SystemVerilog-based VIP for SoundWire Expands Portfolio of VIP for Mobile Applications and Offers Built-in Coverage, Verification Plan and Protocol-aware Debug

Mar 02, 2015Synopsys and Hillcrest Labs Announce Ultra-Low Power Sensor Processing Solution for Always-On Applications
Combination of Synopsys' Sensor and Control IP Subsystem with ARC EM Processor and Hillcrest Labs' Freespace MotionEngine Software Enables Power-Efficient Sensor Processing for Mobile and Wearable Devices

Mar 02, 2015Synopsys and Sensory, Inc. Deliver Ultra-Low Power Voice Control Solution for Mobile, Automotive and Consumer Applications
Sensory TrulyHandsfree Voice Control Software Optimized for Synopsys' DesignWare ARC EM5D Processor Consumes as Little as 0.9 Microwatts in Detection Mode and 40 Microwatts in Recognition Mode

Mar 02, 2015Mellanox and Synopsys Demonstrate Industry’s First PCIe 4.0 Interoperability
Mutual Technology Leadership Lowers Risk for Designers Implementing16GT/s PCI Express Protocol

Feb 26, 2015Synopsys’ embARC Open Software Platform Accelerates Development of ARC-based Embedded Systems for the Internet of Things
Online Access to Open Source Drivers, Operating Systems and Middleware Expands Ecosystem Support for Software Developers Implementing ARC Processor-based Designs

Feb 11, 2015Synopsys' New DesignWare DDR Explorer Tool Delivers Up to 20 Percent Improvement in DDR Memory Subsystem Efficiency
Performance Analysis Tool Accelerates Optimization of Address Mapping, Clock Frequency and Quality of Service for DesignWare DDR Memory Controller

Feb 03, 2015Synopsys' New 25G/50G Ethernet Verification IP Enables Next-Generation Gigabit Designs
Native SystemVerilog Ethernet VIP and Source Code Test Suites Enhanced with Built-in-Coverage and Support for Protocol-aware Debug

Jan 29, 2015Synopsys' New DesignWare Medium Density NVM IP Family Reduces Die Cost by Up to 25 Percent
An Alternative to Embedded Flash Memory, NVM IP Eliminates Need for Extra Masks or Processing Steps for Analog ICs

Jan 22, 2015Synopsys' Silicon-Proven DesignWare HDMI IP Receives HDMI 2.0 Certification
Complete HDMI IP Solution with HDCP 2.2 Certification Meets Highest Security Standards for Ultra-High Definition Multimedia SoCs

Jan 21, 2015Synopsys Expands Memory Verification IP Portfolio with UFS, UniPro and eMMC to Accelerate Verification Closure for Mobile Designs


Jan 15, 2015Rockchip Achieves First-Pass Silicon Success with Synopsys DesignWare IP Portfolio
Accelerated Project Schedule for Mobile Application Processor SoC with DesignWare USB, HDMI and MIPI IP

Dec 09, 2014Synopsys' New LPDDR4 Verification IP Accelerates Verification Closure for High-Performance Low Power Designs
Native SystemVerilog-based Memory VIP Portfolio Expanded to Support JEDEC LPDDR4 with Built-in Coverage, Verification Plan and Protocol-aware Debug

Nov 19, 2014Synopsys Expands IP Accelerated Initiative with New DesignWare IP Prototyping Kits for 10 Interface Protocols
IP Prototyping Kits Enable Designers to Accelerate Prototyping, Software Development and Integration of IP into SoCs

Nov 11, 2014Nitero Achieves First-Pass Silicon Success for Industry's First Mobile 60GHz SoC Using Synopsys DesignWare IP for PCI Express and Tools
High-Quality DesignWare IP, Verification IP and Galaxy Design Platform Tools Deliver Lower Power, Smaller Area and Faster Time-to-Market for Wi-Fi Networking SoC

Nov 06, 2014KYOCERA Document Solutions Uses Synopsys’ Application-Specific Instruction-Set Processor Tool to Accelerate Design of High-Performance Image Processing DSP
Processor Designer Tool Enables KYOCERA Design Team to Reduce Overall Project Schedule by Nine Months

Oct 30, 2014Synopsys Announces Availability of DesignWare Non-Volatile Memory IP for TowerJazz 180-nm Process Technology
Silicon-Proven, Reprogrammable NVM IP Delivers Smallest Area for Calibration and Trimming Applications

Oct 29, 2014Synopsys' New DesignWare Sensor and Control IP Subsystem Delivers Ultra Low Power Sensor and Control Processing for SoCs
Integrated IP Subsystem, Including ARC EM DSP Processors, Floating Point Unit and Control Peripherals, Improves Performance, Energy Consumption and Design Flexibility

Oct 28, 2014Synopsys' New USB 3.1 IP Solution Enables 10 Gbps Data Transfer Speeds for Storage, Digital Office and Mobile Applications
Industry-First Solution Includes DesignWare USB 3.1 Controller, IP Virtual Development Kit and Verification IP

Oct 21, 2014Synopsys STAR Memory System Multi-Memory Bus Processor Enables 10 Percent Die Size Reduction for Marvell SoC
New Multi-Memory Bus Processor Cuts Test Logic in Half While Maintaining High Performance for Networking SoC

Oct 20, 2014Synopsys Introduces Industry's First On-Chip Memory Test and Repair Solution for Embedded Flash
DesignWare STAR Memory System for Embedded Flash Reduces Test Cost by 20 Percent and Enables In-Field Diagnostics for IoT and Automotive SoCs

Oct 14, 2014New DesignWare ARC HS38 Processor Doubles Performance for Embedded Linux Applications
Successor to Popular ARC 770D Core Delivers Significant Performance Increase, Support for 40-bit Physical Addresses and L2 Cache

Oct 08, 2014TSMC Selects Synopsys as "2014 Partner of the Year" for Interface IP and Joint Development of 16-nanometer FinFET Plus Design Infrastructure





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