What is ASIP Designer?

See how Synopsys’ ASIP Designer tool suite uses a single input specification to generate an SDK featuring a highly optimizing C compiler, instruction-set simulator, assembler, linker and debugger, and synthesizable RTL. The tool’s rapid architectural exploration capability and the ability to make rapid changes in your processor model make it easy to optimize the processor for your specific requirements.
Bo Wu, Technical Marketing Manager and Steve Cox, Sr. Manager, Business Development, Synopsys

Introducing Embedded Vision Development System

Drew Taussig introduces the Embedded Vision Development System (EVDS), an integrated solution that accelerates the design of custom processors for embedded vision applications. EVDS is based on the Processor Designer tool set and HAPS FPGA-based prototyping system from Synopsys.
(Length: 4:26)
Drew Taussig

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