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May 11, 2016Synopsys Expands Portfolio of ARC Processors for Safety-Critical Automotive Applications to Include DSP and Cache Support
ASIL D Ready Certified ARC EM Processors with Safety Enhancement Package Accelerate ISO 26262 Certification Time by up to Six Months

May 02, 2016Synopsys Delivers Next-Generation Verification IP for Micron's Hybrid Memory Cube Architecture
Native SystemVerilog VIP Enables Ease of Development for HMC Solutions

Apr 26, 2016Synopsys Delivers Industry's First MIPI I3C IP for Sensor Connectivity Targeting IoT and Automotive Applications
DesignWare IP Compliant with the Latest MIPI I3C Specification Delivers High Bandwidth and Scalability

Apr 13, 2016Synopsys Delivers Industry's First Verification IP for USB Power Delivery 3.0
Native SystemVerilog VIP Features Built-in Coverage, Verification Planning, Protocol-Aware Debug and Source Code Test Suites

Apr 05, 2016Synopsys Extends Verification IP Portfolio for Automotive Applications
Native SystemVerilog VIP and Source Code Test Suites for CAN 2.0/FD/TT, LIN, FlexRay and Ethernet AVB

Apr 04, 2016JEDEC Updates Universal Flash Storage and Related Standards


Mar 30, 2016Synopsys' Custom Compiler Deployed at STMicroelectronics to Boost IP Development Productivity
Template Assistants Shorten Layout Tasks

Mar 14, 2016Synopsys Announces Broad IP Portfolio for TSMC 16FFC Process
DesignWare Logic Library, Embedded Memory, Interface, and Analog IP on TSMC 16FFC Cuts Power Consumption for Advanced SoCs

Feb 24, 2016Synopsys Accelerates Verification Closure of Multimedia SoCs with Next-Generation Verification IP for HDMI 2.0a and HDCP 2.2
Native SystemVerilog HDMI VIP Includes Built-In Coverage, Verification Planning and Protocol-Aware Debug

Feb 23, 2016Synopsys and Mindtree Collaborate to Deliver Complete Bluetooth Smart IP Solution for IoT SoCs
Validated Interoperability of DesignWare Bluetooth Smart PHY IP with Mindtree's Link Layer and Software Stack IP Reduces Integration Risk

Feb 18, 2016Synopsys and Cypherbridge Accelerate TLS Record Processing for IoT Communication with Optimized Hardware/Software Security Solution
Combination of Cypherbridge uSSL SDK and DesignWare SSL/TLS/DTLS Security Protocol Accelerator Speeds Software Development

Feb 18, 2016Synopsys and Intrinsic-ID Collaborate to Accelerate Implementation of Security for IoT Edge Devices
Integration of Intrinsic-ID PUF Solution and Synopsys ARC EM Processor with SecureShield Enables Implementation of Security Functions without Requiring Dedicated Security Processor

Feb 03, 2016Synopsys' 10 Gbps USB 3.1 IP First to Pass USB-IF Certification
USB-IF Certified IP Ensures Interoperability and Lowers Integration Risk for High-Performance, Low-Power SoC Designs

Feb 01, 2016Synopsys Delivers Industry's First SAS 24G Verification IP for Enterprise Storage Systems
First Verification IP Product Line That Includes All SAS Interface Speed Configurations

Jan 27, 2016Synopsys Launches New IP Subsystem to Accelerate Data Fusion Processing in IoT Devices
DesignWare Smart Data Fusion IP Subsystem Integrates Latest ARC EM DSP Processors, Peripherals and Software to Boost Signal Processing Performance and Reduce Energy Consumption

Jan 26, 2016Synopsys Introduces USB 3.1 Type-C IP with DisplayPort 1.3 and HDCP 2.2 for High-Bandwidth Data Transfer with Content Protection
DesignWare IP Solution Accelerates Development of SoCs Delivering Secure Video, Data and Power over a Single USB Type-C Connector

Jan 25, 2016Synopsys Platform Architect MCO Delivers Industry's First Power-Aware Architecture Analysis Tool Supporting IEEE 1801-2015 UPF 3.0
Solution Enables Efficient Reuse of UPF 3.0 System-Level IP Power Models for Early Analysis of SoC Architectures for Power and Performance

Jan 06, 2016Synopsys DesignWare IP Enables First-Pass Silicon Success for SK Hynix Universal Flash Storage Device
High-Quality IP Enables Integration in Two Weeks and Speeds Time to Volume

Dec 17, 2015iCatch Technology Selects Synopsys' DesignWare IP Portfolio for Digital Video and Image SoCs
High-Quality IP Combined with Synopsys' HAPS-70 FPGA-Based Prototyping System and Professional Services Accelerate Time-to-Market

Dec 09, 2015MIPI UniPro Interoperability Test Workshops Advance Industry Adoption of High-Speed, Low-Power Mobile Interface Solutions
Second Testing Event of the MIPI UniPro℠ and MIPI M-PHY® Specifications Demonstrates Mature, Efficient Implementation for Industry Adopters and Highlights UFS-Enabled Applications

Dec 09, 2015NBASE-T Alliance Celebrates One-Year Anniversary With New Specifications and Members
Alliance Puts Standardization and Product Development on Fast Track

Nov 27, 2015SGS-TÜV Saar Certifies Ethernet QoS Controller IP from Synopsys According to ISO 26262


Nov 23, 2015Synopsys Delivers Industry's First Ethernet 400G Verification IP for Next-Generation Networking and Communications Systems
Native SystemVerilog Ethernet VIP Features Built-in Coverage, Verification Planning, Protocol-Aware Debug and Source Code Test Suites

Nov 10, 2015Synopsys Enables Next-Level of Productivity with Addition of System-Level Capabilities to Verification IP for ARM Cache Coherent Protocols
Expands Comprehensive VIP library for ARM® AMBA® protocols with System-Level Test Suites, System Monitor, Protocol-aware Debug and Performance Analysis; Adds VIP for New AMBA 5 AHB5 Standard




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