News 



May 21, 2015Synopsys Announces Industry's Lowest Power PCI Express 3.1 IP Solution for Mobile SoCs
Silicon-Proven, Compliant DesignWare IP Cuts Active Power Consumption to Less than 5 mW/Gb/Lane and Standby Power to Less than 10 uW/Lane

May 14, 2015Synopsys and Broadcom Expand Collaboration to Deploy ARC Processors in Multimedia and Networking Solutions
New Licensing Agreement Builds on Successful Use of ARC IP Cores in Broadcom's High-Volume Home Video Products

May 13, 2015Synopsys' Verification IP for DDR4 3DS Enables DRAM Designs with Higher Density and Performance at Reduced Power
Native SystemVerilog-based VIP for DDR4 3DS Expands Synopsys' Portfolio of Memory VIP and Offers Built-in Coverage, Protocol Checks, Verification Plan and Protocol-aware Debug

Apr 28, 2015Synopsys' New DesignWare Hybrid IP Prototyping Kits Accelerate IP Prototyping, Software Development and Integration
Combined Benefits of Virtual Prototyping and FPGA-Based Prototyping Speed Development for DesignWare IP in 64-bit ARM-Based Designs

Apr 07, 2015Synopsys Announces Immediate Availability of Broad Portfolio of Silicon-Proven IP for TSMC 16-nm FinFET Plus Processes
DesignWare IP on TSMC 16FF+ Processes Enables Designers to Accelerate Development of Mobile and Enterprise SoCs

Mar 30, 2015Synopsys Launches High-Performance Embedded Vision Processor IP
DesignWare EV Processor Family Delivers Faster Object Detection with Significantly Lower Power Consumption

Mar 25, 2015New Synopsys ASIP Designer Tool Speeds Development of Application-Specific Instruction-Set Processors by 5X
Automatic Generation of the Software Development Kit in Parallel with the Hardware Model Enables Rapid Architectural Exploration to Optimize ASIPs for Power, Performance and Area

Mar 17, 2015Synopsys Joins the AVnu Alliance
Alliance grows technology ecosystem with the addition of Synopsys to their membership roster.

Mar 16, 2015Baikal Electronics Selects Synopsys Solutions to Accelerate the Design and Verification of Their Advanced SoCs
Solutions Include DesignWare IP, Platform Architect, Galaxy Design Platform and Functional Verification

Mar 12, 2015Synopsys and Hardent Provide Interoperable Display IP Solutions to Reduce Data Transmission Bandwidth for Ultra High-Definition Mobile Devices
Combination of Synopsys DesignWare MIPI DSI IP and Hardent VESA Display Stream Compression IP Enables Single and Dual High-Definition Displays

Mar 12, 2015Synopsys' New Verification IP for MIPI SoundWire Enables Audio and Control Interfaces in Low Power Designs
Native SystemVerilog-based VIP for SoundWire Expands Portfolio of VIP for Mobile Applications and Offers Built-in Coverage, Verification Plan and Protocol-aware Debug

Mar 02, 2015Synopsys and Hillcrest Labs Announce Ultra-Low Power Sensor Processing Solution for Always-On Applications
Combination of Synopsys' Sensor and Control IP Subsystem with ARC EM Processor and Hillcrest Labs' Freespace MotionEngine Software Enables Power-Efficient Sensor Processing for Mobile and Wearable Devices

Mar 02, 2015Synopsys and Sensory, Inc. Deliver Ultra-Low Power Voice Control Solution for Mobile, Automotive and Consumer Applications
Sensory TrulyHandsfree Voice Control Software Optimized for Synopsys' DesignWare ARC EM5D Processor Consumes as Little as 0.9 Microwatts in Detection Mode and 40 Microwatts in Recognition Mode

Mar 02, 2015Mellanox and Synopsys Demonstrate Industry’s First PCIe 4.0 Interoperability
Mutual Technology Leadership Lowers Risk for Designers Implementing16GT/s PCI Express Protocol

Feb 26, 2015Synopsys’ embARC Open Software Platform Accelerates Development of ARC-based Embedded Systems for the Internet of Things
Online Access to Open Source Drivers, Operating Systems and Middleware Expands Ecosystem Support for Software Developers Implementing ARC Processor-based Designs

Feb 11, 2015Synopsys' New DesignWare DDR Explorer Tool Delivers Up to 20 Percent Improvement in DDR Memory Subsystem Efficiency
Performance Analysis Tool Accelerates Optimization of Address Mapping, Clock Frequency and Quality of Service for DesignWare DDR Memory Controller

Feb 03, 2015Synopsys' New 25G/50G Ethernet Verification IP Enables Next-Generation Gigabit Designs
Native SystemVerilog Ethernet VIP and Source Code Test Suites Enhanced with Built-in-Coverage and Support for Protocol-aware Debug

Jan 29, 2015Synopsys' New DesignWare Medium Density NVM IP Family Reduces Die Cost by Up to 25 Percent
An Alternative to Embedded Flash Memory, NVM IP Eliminates Need for Extra Masks or Processing Steps for Analog ICs

Jan 22, 2015Synopsys' Silicon-Proven DesignWare HDMI IP Receives HDMI 2.0 Certification
Complete HDMI IP Solution with HDCP 2.2 Certification Meets Highest Security Standards for Ultra-High Definition Multimedia SoCs

Jan 21, 2015Synopsys Expands Memory Verification IP Portfolio with UFS, UniPro and eMMC to Accelerate Verification Closure for Mobile Designs


Jan 15, 2015Rockchip Achieves First-Pass Silicon Success with Synopsys DesignWare IP Portfolio
Accelerated Project Schedule for Mobile Application Processor SoC with DesignWare USB, HDMI and MIPI IP

Dec 09, 2014Synopsys' New LPDDR4 Verification IP Accelerates Verification Closure for High-Performance Low Power Designs
Native SystemVerilog-based Memory VIP Portfolio Expanded to Support JEDEC LPDDR4 with Built-in Coverage, Verification Plan and Protocol-aware Debug

Nov 19, 2014Synopsys Expands IP Accelerated Initiative with New DesignWare IP Prototyping Kits for 10 Interface Protocols
IP Prototyping Kits Enable Designers to Accelerate Prototyping, Software Development and Integration of IP into SoCs

Nov 11, 2014Nitero Achieves First-Pass Silicon Success for Industry's First Mobile 60GHz SoC Using Synopsys DesignWare IP for PCI Express and Tools
High-Quality DesignWare IP, Verification IP and Galaxy Design Platform Tools Deliver Lower Power, Smaller Area and Faster Time-to-Market for Wi-Fi Networking SoC




NewsArticlesBlogsWhite PapersWebinarsVideosNewslettersCustomer Successes