|DesignWare UFS, UniPro and M-PHY IP Enable First-Pass Silicon Success for SK Hynix|
“By using Synopsys’ DesignWare UFS, UniPro and M-PHY IP, optimized for power and performance, we were able to integrate the IP in two weeks, speed our design schedule by six months and achieve volume production.”
J. W. Park,
|Fuji Xerox Develops Scanned Image Data Processing ASIP Using Synopsys ASIP Designer|
“By using Synopsys’ ASIP Designer tool, we were able to reduce gate count by 70%, which enabled us to implement our design in an FPGA and retain the required system performance of printing 70 pages a minute with our multifunction printer.”
Manager, Controller Development Group,
|Siglead Achieves First-Pass Silicon Success with ARC Processors & DesignWare IP|
“Synopsys’ reputation as an established provider of silicon-proven IP was a key factor in our decision to use ARC processor IP in our SSD Controller LSI. The best-in-class ARC cores are easy to configure and we were confident that they would provide the flexibility and performance we needed to meet our design and schedule goals.”
Director, Digital Solution Division,
|MegaChips Meets Aggressive Performance & TTM Targets with DesignWare SATA IP|
"DesignWare SATA IP met all of our high performance and time-to-market requirements without compromise. As the IP is successfully shipping in hundreds of designs, we had no doubt about its reliability and quality."
|Marvell Reduces Networking SoC Die Size by 10% with STAR Memory System|
“Synopsys’ STAR Memory System and Multi-Memory Bus Processor is unique to the industry. No competitive solution can match its flexibility, high test coverage, and ability to minimize test area, power and cost.”
Marvell Semiconductor, Inc.