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A “Completely Cool” Case Study – Synopsys Low Power Frontend Implementation - Silicon Valley, 2017
TutorialVideo

A “Completely Cool” Case Study – Synopsys Low Power Frontend Verification - Silicon Valley, 2017
TutorialVideo

A Journey to a Successful VIP Migration: A PCI-Express Testbench Case Study - Silicon Valley, 2017
Chien-Chih Yu - Oracle
PaperPresentation

A Simple RTL IP Obfuscation Flow - Using Synopsys VCS, DC and Formality - Silicon Valley, 2017
David Flynn - ARM
PaperPresentationSession Recording

Accelerating ECO Implementation Using Formality Ultra - Silicon Valley, 2017
TutorialVideo

Accelerating Interconnect Timing Closure with Synopsys Design Compiler Graphical and IC Compiler II - Silicon Valley, 2017
Monica Tang, Kurt Shuler - Arteris
PaperPresentationSession Recording

Achieving Optimized QoR with ProtoCompiler on Mixed HAPS-70 & HAPS-80 Systems - Silicon Valley, 2017
Ramanan Sanjeevi Krishnan, Sivarama Prasad Valluri - NVIDIA
PresentationSession Recording

Addressing Circuit Simulation Challenges in Advanced Node Designs Using CustomSim - Silicon Valley, 2017
TutorialVideo

Addressing the Challenges in Verifying Next-Generation Network Products - Silicon Valley, 2017
TutorialVideo

Advanced Memory Test and Repair with SMS and Hierarchical Test and Diagnosis from IPs to SoC with SHS - Silicon Valley, 2017
TutorialVideo

Advanced Techniques to Reduce the Crosstalk Pessimism in the PrimeTimeSI Timing Analysis - Silicon Valley, 2017
Stella Matarrese, Patrick Bougant - STMicroelectronics
PaperPresentation

An Efficient and Accelerated Approach to Fault Injection and Diagnostic Coverage Calculations of a Complex SoC - Silicon Valley, 2017
PaperPresentation

Automatic Conversion of a Channel Based Design to an Abutted Design - Silicon Valley, 2017
Publish Only

Benefits of a Cell-Aware Flow - Silicon Valley, 2017
Nelly Feldman, Roberto Gonella - STMicroelectronics
PresentationSession Recording

Best Practices for High-Performance, Energy Efficient Implementations of the Latest ARM Processors - Silicon Valley, 2017
TutorialVideo

Boosting Debug Productivity – Practical Applications of Verdi Debug Innovations - Silicon Valley, 2017
Tutorial

Building and Deploying the Tegra System Virtual Prototype - Silicon Valley, 2017
Ling Yang - NVIDIA
Presentation

Cell Level Electromigration Characterization in SiliconSmart - Silicon Valley, 2017
Jing Li, Animesh Datta, Felipe Ferreira, Sai Chaitanya Guruvu, Satadru Sarkar, Joseph Siu - Qualcomm
PaperPresentationSession Recording

Cell-Aware Test for Lower DPPM and Faster Silicon Yield Ramp with Diagnostics - Silicon Valley, 2017
TutorialVideo

Characterization of Complex Cells - Silicon Valley, 2017
Travis Swanson - Micron Technology
Publish Only

Clock Domain Bridge Static Timing Analysis - Silicon Valley, 2017
Miles Simpson - Microsoft
PaperPresentation

Constraining the Synopsys Pin Access Checker Utility for Improved Standard Cells Library Verification Flow - Silicon Valley, 2017
Yongfu Li, Wan Chia Ang, Chin Hui Lee, Kok Peng Chua, Yoong Seang Jonathan Ong, Chiu Wing Colin Hui - GLOBALFOUNDRIES
Publish Only

Design Compiler Lunch & Learn: Advanced Silicon Design Success with Design Compiler - Silicon Valley, 2017
Tutorial

Design for Reconfigurability - Silicon Valley, 2017
Kalyana Venkataraman, Shahe Krakirian - Cavium
PaperPresentationSession Recording