| May 13, 2013 | Achronix Tapes Out Industry's First FinFET-based System-on-Chip Using Synopsys' IC Compiler and IC Validator
Synopsys Uniquely Proven for the Emerging New Wave of FinFET-based Process Technology
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| Apr 15, 2013 | LG Adopts In-Design Physical Verification with IC Compiler and IC Validator after Multiple Successful Tapeouts
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| Mar 19, 2013 | Micronas Standardizes on Synopsys’ Design and Verification Solutions for Automotive Designs
Solutions Include Galaxy Custom and Digital Implementation, Discovery Verification Platform
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| Feb 07, 2013 | UMC Adopts Synopsys IC Validator for Pattern Matching-Based Lithography Hot-Spot Verification at 28 nm
Successful Collaboration Simplifies Design Closure for Manufacturing, Helps Accelerate Time to Silicon
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| Jan 22, 2013 | Synopsys Accelerates Adoption of FinFET Technology with Production-Proven Design Tools and IP
FinFET Technology Support Developed over Five-year Collaboration with Industry Leaders
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| Oct 15, 2012 | Synopsys and TSMC Collaborate for 20nm Reference Flow
Design Tools in Synopsys® Galaxy™ Implementation Platform selected in 20nm Reference Flow for Physical Implementation, RC Extraction, Timing Analysis and Physical Verification
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| Oct 11, 2012 | Synopsys and TSMC Deliver 3D-IC Design Support
Design Tools Selected in TSMC's First Integrated, Validated Reference Flow and Design Kit Enabling Multi-Die Integration Using TSMC CoWoS Technology
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| Sep 06, 2012 | Synopsys IC Validator Delivers Faster Manufacturing Compliance For 20nm and Below
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| Jun 04, 2012 | Synopsys and Samsung Deliver a Complete Solution for 20-Nanometer Node
Solution Includes Place and Route, Physical Verification, and Signoff Design Tools
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| Feb 09, 2012 | CSR Selects Synopsys for Advanced-Node SoC Design
Adoption of Synopsys Galaxy Platform Driven by Superior Results for ARM CPU-based SoCs
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| Oct 25, 2011 | eSilicon Selects Synopsys' Custom IC Design Solution and Tapes Out 28-nm Designs
Comprehensive Solution Enables Rapid Ramp-up and Delivery of Advanced Custom IP
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| Jul 11, 2011 | Synopsys Leads in Delivering Dual-Patterning-Compliant 20nm IC Implementation Support
Synopsys builds on award-winning IC Compiler Zroute and IC Validator In-Design Physical Verification technologies
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| Jul 11, 2011 | Synopsys Announces Milestone in 20-nm Collaboration with Samsung Electronics
Samsung successfully tapes out first 20-nm test chip using IC Compiler and In-Design Physical Verification with IC Validator
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| Nov 17, 2010 | IC Validator Qualifies for TSMC's 40-nm and 65-nm iDRC/iLVS Physical Verification runsets
Runset Availability Enables Faster Tapeouts with In-Design Physical Verification
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| Oct 12, 2010 | 100 Tapeouts Underscore Rapid and Broad Acceptance of Synopsys In-Design Physical Verification
Top Semiconductor Manufacturers Standardize on In-Design Physical Verification with
Synopsys IC Compiler and IC Validator
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| Jun 10, 2010 | Samsung Electronics Achieves First-Pass 32nm Silicon Success
Synopsys, Inc. today announced that Samsung Electronics' Foundry business (Samsung Foundry) has successfully taped out its first 32-nanometer (nm) system-on-chip (SoC) design using Synopsys' Galaxy™ Implementation Platform.
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| Jun 09, 2010 | Synopsys Delivers Design Enablement for TSMC 28-nm Process Technology
Addition of System-Level and In-Design Technology Support Further Enables a Path to Optimized Silicon
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| Jul 23, 2009 | TSMC and Synopsys Collaborate on Interoperable Unified Physical Verification Formats
Synopsys, Inc., today announced that its recently launched IC Validator DRC/LVS product now fully supports interoperable Design Rule Checking (iDRC) and Layout-Versus-Schematic (iLVS), the new TSMC unified physical verification formats.
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| Jul 16, 2009 | Achronix Deploys Synopsys IC Validator and IC Compiler for Next-Generation FPGA Design
Synopsys, Inc., today announced that Achronix Semiconductor Corporation, maker of ultra-fast field-programmable gate arrays (FPGAs), has deployed Synopsys' IC Compiler and the recently announced IC Validator, the newest addition to the Galaxy™ Implementation Platform, for designing their next generation of high-end FPGAs.
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| Jun 29, 2009 | Aquantia Deploys Synopsys IC Validator and IC Compiler for 40nm Quad 10GBASE-T Design
Synopsys, Inc., today announced that Aquantia, the leading innovator in 10GBASE-T networking, has deployed Synopsys' recently announced IC Validator, the newest addition to the Galaxy™ Implementation Platform, into production use at 40 nanometers (nm).
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| May 11, 2009 | Synopsys Launches IC Validator, Offers Significant Reduction in Physical Verification Turnaround Time
Qualified for 32nm and 28nm process nodes
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| May 11, 2009 | Synopsys IC Validator Adopted by NVIDIA for Sign-Off Physical Verification
IC Validator Delivers 20x Faster Physical Verification Using 25 CPUs
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| Jan 08, 2008 | Silicon Canvas Laker Environment Integrates With Hercules Physical Verification Suite From Synopsys
Silicon Canvas, developer of the Laker® suite of high-performance tools for custom IC design, and Synopsys, Inc. (NASDAQ: SNPS), a world leader in software and IP for semiconductor design and manufacturing, today announced the integration of Silicon Canvas' Laker schematic capture and layout environment with Synopsys' Hercules™ Physical Verification Suite (PVS).
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| Mar 27, 2007 | Synopsys Enables STMicroelectronics to Achieve First-Silicon Success for
Synopsys, Inc. (Nasdaq: SNPS), a world leader in semiconductor design software, today announced that it has enabled STMicroelectronics to achieve first-silicon success for its new STi7200 dual-video-stream high-definition (HD) decoder, aiming to serve a broad range of digital consumer applications including set-top boxes, high-definition DVDs (dual-standard Blu-ray and HD-DVD) and digital TVs.
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