SNUG Silicon Valley: High-Performance Cores Panel 

SNUG Silicon Valley: High-Performance Cores Panel

Achieving Optimum Results on High-Performance Processor Cores

This video was taken during Synopsys’ User Group (SNUG) in Silicon Valley on March 25, 2013, where attendees had the opportunity to hear from a panel of designers, with hands-on experience, share their insights and best practices for achieving optimum results on high-performance processor cores.

High Performance Panel - Brian Millar Brian Millar
IC Compiler Luncheon Event Moderator
Physical Implementation Lead

High Performance Panel - Koen Lampaert Koen Lampaert
Associate Technical Director
Broadcom *Live presentation only

High Performance Panel - ShinChin Ouyang ShiChin Ouyang
Program Manager

High Performance Panel - Frederic Nyer Frédéric Nyer
CPU Technical Lead

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