News 

New VDK Enables Automotive Suppliers and OEMs to Start Software Development in Prior to ECU Board Availability

New Virtualizer Development Kits for ARMv8 Processors Enable Early Software Development Up To One Year in Advance of Silicon

Joint Engineering Team Will Develop Virtual Prototypes to Speed Software Debug and System Testing for Renesas' RH850 Microcontroller-Based Designs

New Modeling Interface and Automation Features Increase Modeling Productivity to Enable Earlier Start of Software Development

AURIX Virtual Prototype Enabled Automotive Software Developers to Start 12 Months Before Silicon Availability

VDK Family Delivers Fast Software Bring-Up and Better Debug Control for Quad-Core ARM® Cortex™-A15 MPCore™ Processor and ARM big.LITTLE™ Processing-Based Designs

Synopsys announced the launch of TLMCentral (link TLMCentral to www.tlmcentral.com, if possible) the first industry-wide web portal for developers and users of transaction-level model (TLM) technology. TLMCentral aggregates information about free and commercial system-level models of common system-on-chip (SoC) components from leading semiconductor IP vendors, tool providers, service companies and universities. TLMCentral is an open portal that will ease and accelerate the development of virtual prototypes across the industry. It is available at no cost to users and providers of transaction-level models.

Synopsys and ARM® announced a licensing agreement enabling Synopsys to distribute ARM's Fast Models and create models of ARM Cortex Series processors.

Virtualizer Accelerates Software Development Schedules By Up To Nine Months with Lower Engineering Effort

Synopsys announced the broad availability of Platform Architect with Multicore Optimization Technology, a new solution for performance analysis and early definition of multicore system architectures in SystemC. Using Platform Architect with Multicore Optimization Technology, designers of SoCs, chipsets and systems can capture hardware/software performance models of multicore system architectures in the early concept phase for robust performance measurement and trade-off analysis, months prior to software availability.

Synopsys announced that Mazda Motor Corporation, a leading producer of automobiles, has adopted Synopsys CoMET-METeor virtual prototyping solution to verify their Electronic Control Units (ECUs). Over the last year, Mazda has been using the METeor embedded software development environment to conduct its ECU system verification in a virtual environment. By decreasing the number of tests on real automobiles and hardware-in-the-loop (HILS) test equipment, the virtual prototyping solution will enable Mazda to save significant time and cost.

Synopsys has completed the acquisition of CoWare, Inc., a global supplier of software and services for electronic systems design. The acquisition will expand Synopsys' portfolio of system-level design and verification products used in wireless, consumer and automotive design.

Synopsys announced it has acquired VaST Systems Technology Corporation to extend its virtual prototyping solutions into the automotive and consumer application space. The acquisition adds a comprehensive set of processor sub-system models frequently found in automotive and consumer applications to Synopsys' virtual prototyping portfolio.

Synopsys announced the availability of SuperSpeed USB 3.0 transaction-level models (TLM) supporting the Open SystemC™ Initiative (OSCI) TLM-2.0 API specification. The models are TLM representations of the Synopsys DesignWare® SuperSpeed USB 3.0 Device and xHCI Host Controller IP.

ARM today announced at DAC, San Francisco, Calif., that CoWare, Mentor Graphics and Synopsys Inc. have joined the ARM® Fast Models Enablement Program.

Synopsys today announced its System-Level Catalyst Program to accelerate the adoption of system-level design and verification.

JEDA Technologies announced today the availability of its TLM-2.0 Compliance Checker for high-level SystemC models. The product targets high-level OSCI TLM-2.0 model developers and OSCI TLM-2.0 compliant Virtual Platform users. The checker reduces high-level SystemC model development time and ensures interoperability with OSCI TLM-2.0 models coming from various sources.

Synopsys today announced support for the newly ratified Open SystemC Initiative (OSCI) SystemC™ TLM-2.0 standard in its Innovator and DesignWare® System-Level Library products.

Synopsys will highlight its complete virtual platform solutions and DesignWare® System-Level Library at the Freescale Technology Forum (FTF) in Orlando, Florida on June 16 - June 18, 2008.

Synopsys today announced the immediate availability of 30 new titles in the DesignWare® System-Level Library.

Synopsys today announced a collaboration with Fujitsu Limited to provide advanced virtual platform technology to customers as a Fujitsu CedarTM- Electronic System Level (ESL) services provider.

Synopsys today announced the DesignWare® System-Level Library. The library provides high- performance SystemC transaction-level simulation models (TLMs) for assembling virtual platforms, including instruction set simulators (ISS), and TLMs of Synopsys' DesignWare Cores and ARM® AMBA® interconnect components.

Synopsys today announced the availability of the DesignWare® VPXA3 Virtual Platform for development of smartphones, hand-held and consumer electronics devices that use Marvell PXA3xx XScale technology next-generation application processor.