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| IC Compiler-1 |
This course teaches how to use IC Compiler to perform placement, power, DFT, CTS, routing, SI and optimizations, achieving design closure for moderate to high challenge designs. You will also learn how to perform Design for Manufacturing tasks, as well as produce a flat floorplan.
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| IC Compiler-2: Clock Tree Synthesis |
This course teaches how to use IC Compiler to perform pre-CTS checks and build clock trees to achieve good quality of results (QoR). The workshop will discuss how to perform debugging and identifying problem areas that can prevent ICC-CTS from achieving better QoR.
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| IC Compiler 2: Hierarchal Design Planning |
This course is targeted for engineers working on large, complex designs where hierarchical design planning is required. This hands-on class uses the concurrent planning and implementation flow that helps achieve faster time to results. It teaches you how to create design partitions, floorplan, constraints, and timing for hierarchal design implementation. This class builds on the fundamentals of floorplanning taught in the IC Compiler 1 class.
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