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Technical Papers 2005

Conference Papers and Presentations

IEEE SOCC 2005
Challenges in PowerPC440-FS Soft Core Development: Timing perspective
Terry Biggs, Ken Umino and Kaijian Shi,Synopsys Professional Services, Synopsys Inc.

IP SoC 2005
Automated Implementation Flows based on IP-level constraints and synthesis intent in XML
Denis Bussaglia, Synopsys Professional Services
Marino Strik, Philips Semiconductors
Mark Noll, Synopsys Solutions Group
Geoff Mole, Philips Semiconductors
Ralf Gaisbauer, Philips Semiconductors
Hans Peter van Lohuizen, Philips Semiconductors

SNUG Boston 2005
Designing a Reusable Transactor using Transactor Callback Methods – A Case Study
John Zook, StarGen Inc.
Jason C. Chen, Synopsys Professional Services

Method for Data Link Layer and Physical Layer Error Insertion
Jim Sweeten, Stargen, Inc.
Tony Ezell, Synopsys Professional Services

Power Plan Design Techniques for 0.13u Designs
Srini Burugu, Sumeer Arya, Steve Doan, Synopsys Professional Services

AMBA DesignWare® and coreAssembler Simplify the Design Flow and Improve Design Timing for STMicroelectronics Digital Radio Controller & Audio Decoder
Mauro Bosco, ST Microelectronics
Sam Bordbar, Synopsys Professional Services
Andreas Vielhaber, Synopsys, Inc

IEEE SOCC 2005
Virtual Hierarchical Design Representations for Distributed Optimization of Multi-Million Gate Designs
Thi Nguyen, Synopsys Inc.
Kaijian Shi, Synopsys Professional Services

A Clock Isolation Method For Complex SoC Designs
Kaijian Shi, Synopsys Professional Services
Hichem Belhadj, Actel Co.

SNUG Taiwan 2005
Experience of lower power design methodology with Dynamic Frequencyand Voltage Scaling in SoC design
Dave Scott and SachinIdgunji, Synopsys
Dar-Sun Tsien, Ph.D., UMC
Dave Flynn, ARM

SNUG China 2005
Writing a RVM-Compliant AHB Master Transactor
Prof. Yang Zhi Jia, Zhang Yu Feng, Li Su Gang, Shenyang Institute of Automation, Chinese Academy of Sciences
Jason C. Chen, Synopsys Professional Services

SNUG India 2005
Integration Methodology with Reusable & Configurable IPs
Vivek Singh, Synopsys Professional Services
Preeti Rani, STMicroelectronics Ltd.,
Co-Authors:
Sanjeev Varshney, STMicroelectronics Ltd.,
Sal Tiralongo, Synopsys Professional Services

SNUG Europe 2005
Timing Closure for 0.13um Design Using Various Clock Routing Techniques
Sameer Nayar, PLX Technology Sumeer Arya, Srini Burugu, Brandon Waldo, Synopsys Professional Services

A Powerful Development Environment and its Fully Integrated Vera Based System Verification Environment, for the Highly Parametric STBus Communication System
Giuseppe falconeri, Nizar Rhomdane, Houssem Bdioui, ST Microelectronics Sal Tiralongo, Nicolas Meunier, Synopsys Professional Services Francoise Casaubieilh, Synopsys Verification Group

Clock Isolation Logic and Circuit for Complex SoC Designs
Hichem Belhadj Actel Co.
Kaijian Shi IP and Design Services, Synopsys Inc.

RTL-to-GDSII Design Methodology for Dynamic-Frequency and Voltage-Scaling-Enabled SoC-A Case Study
Dar-Sun Tsien, Ph.D. Sr. Director of Design Methodology, UMC
Dave Flynn ARM Fellow, ARM
Dave Scott and Sachin Idgunji Staff Design Consultants Synopsys
Professional Services

SNUG San Jose 2005
Floorplanning Principles
Kevin Knapp and Chris Smith, Synopsys Professional Services

Numerical Analysis of Parasitic Effects in Deep Submicron Technologies
Cole Zemke, IBM
Kevin Brelsford, WWAS, Synopsys, Inc.
Jitendra Lagu, Synopsys Professional Services

Methodology to Close Timing on All Corners with Synopsys Galaxy at and Below 130nm
Atif Hussain, Texas Instruments
Ken Umino, Synopsys Professional Services

Verification of a Mixed Signal ASIC Using SystemVerilog with MATLAB and the DPI
Rene Abraham and Rabeek Mohamed, Midas Communications Technology, Inc.
Ron Shipp, Synopsys Professional Services

A Hierarchical Rail Analysis Flow for Multimillion Gate SoCs - Challenges and Solutions
Hamid Piroozi, Krishna Gopinathannair, Thomson, Inc.
Ted Bernard and David Stringfellow, Synopsys Professional Services

Methodology to Perform Rail Analysis at a Very Early Stage of the Design using AstroRail
Kenneth Egan, X-EMI, Inc.
Hani Saleh, Synopsys Professional Services


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