Galaxy Design Platform
The most comprehensive solution for advanced integrated circuit design.
The Galaxy™ Design Platform is an integrated design implementation environment with best-in-class tools, enabling advanced IC design. Anchored by Synopsys’ industry-leading IC implementation and sign-off tools, together with the open Milkyway™ database, the Galaxy Design Platform incorporates consistent timing, signal integrity (SI) analysis, common libraries, delay calculation, and constraints from RTL all the way to silicon. By concurrently optimizing for timing, area, SI, power, test, and yield, the Galaxy Design Platform delivers the highest performance with the fastest time to results. Finally, correlated optimization and analysis throughout the design process ensures the most efficient flow with predictable results.

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Discovery Verification Platform
Delivering a new level of productivity for advanced SoC design verification.
The Discovery™ Verification Platform is an integrated verification solution for systems, RTL and mixed-signal designs. Built on the industry’s highest performance simulation engines, the Discovery Verification Platform delivers maximum productivity across a broad set of verification applications and methodologies, including mixed-HDL and mixed-signal simulation, system-level design and analysis, assertion-based verification, verification IP, coverage-driven, constrained-random testbenches, and formal analysis. The Discovery Platform components support standard languages including SystemVerilog, SystemC™, Verilog, VHDL, Verilog-AMS, VHDL-AMS, MAST®, and OpenVera®.

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DesignWare IP and System Solutions Portfolio
Synopsys DesignWare® intellectual property (IP) provides designers with a broad portfolio of digital IP cores, verification IP, and hardened mixed-signal PHYs. When combined with our large investment in design for re-use and verification methodology, certification, silicon validation, and comprehensive worldwide technical support, DesignWare IP gives hardware designers a faster and lower risk path to chip success.

Synopsys system-level solutions include tools and virtual platforms that connect hardware and software development flows for leading systems-on-chip (SoC) platforms. The combination of IP and system-level solutions is unique in that it enables the concurrent development, integration and verification of hardware and software throughout the design cycle. This results in significantly faster releases of platform-based systems and SoC products, and as much as a 9 to 12 month reduction in time to market.

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Design for Manufacturing Product Family
Synopsys RTL-to-silicon solution.
In the ongoing drive towards smaller, faster, and less expensive chips, the lines between design and manufacturing are blurring. Where there used to be a clear separation of design and manufacturing responsibilities between groups, there is now the need for intense collaboration and communication. Synopsys offers the only complete RTL-to-silicon solution with its Galaxy Design and Discovery Verification Platforms and Design for Manufacturing (DFM) product offerings. Synopsys DFM products enable customers to develop, deploy, and optimize manufacturing processes at advanced process nodes. The combined use of Synopsys platforms and DFM products allows customers to establish the critical links between design and manufacturing that are necessary to implement and ramp manufacturable, high yielding processes at the 90 nanometer (nm), 65-nm, and 45-nm process nodes.

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Synopsys Professional Services
Helping customers improve design productivity and mitigate their project risks.
Synopsys Professional Services delivers a comprehensive portfolio of consulting and design services that help customers get the most from their Synopsys technology investment and achieve success on their design projects.

As an integral part of Synopsys, we have a thorough understanding of the industry’s leading design tools and methodologies. As designers ourselves, we have an extensive resumé of work on advanced designs and know how to resolve complex design bottlenecks and deploy advanced flows. Our customers take advantage of this combination of Synopsys product expertise and experience in leading-edge designs to achieve predictable chip tapeouts.

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