|Successful GPU IP Implementation on Synopsys HAPS Platforms using ProtoCompiler|
Learn how Synopsys ProtoCompiler and debug tool coupled with the flexible HAPS prototyping systems helps GPU developers tackle implementation of complex GPU IP and its end applications.
Andy Jolley, Senior Staff Application Consultant, Synopsys
Feb 04, 2015
|Getting the Most out of IP-based Designs with Synplify FPGA Design Tools|
Learn how to streamline and automate your IP-based FPGA design flow using Synopsys FPGA design tools, allowing you to attain your design objectives within the framework of how IP will be delivered.
Parminder Gill, Engineering Project Leader, FPGA Implementation, Synopsys
Feb 03, 2015
|How Reliable is Your FPGA Design? Tips and Tricks for Building-in High Reliability|
Learn how to automatically "build in" high reliability using Synopsys Synplify Premier FPGA design tool.
Sharath Duraiswami, Senior Corporate Applications Engineer, Synopsys
Oct 02, 2014
|ProtoCompiler Accelerates HAPS FPGA-Based Prototyping Systems|
This webcast examines the latest generation of design tools for prototyping, Synopsys ProtoCompiler, a suite of design automation and debugging tools for the Synopsys HAPS Series of FPGA-based prototypes.
Troy Scott, Product Marketing Manager, Synopsys
Jul 23, 2014
|Automate ASIC to FPGA-based Prototype Conversion with Synplify|
Using Synplify, automate ASIC to FPGA-based prototype conversion to accelerate fast FPGA-based working prototype bring-up, debug and validation.
Dr. Angela Sutton, Staff Product Marketing Manager, FPGA Implementation, Synopsys
Jun 18, 2014
|Increase FPGA Performance with Enhanced Capabilities of Synplify Pro and Premier|
Timing is everything! Find out how to reproducibly improve FPGA performance results using Synplify Pro and Synplify Premier. This webinar includes tips on how to set up you FPGA design to achieve better timing results downstream, recommended techniques to analyze and tune design performance for faster timing closure and new "under the hood" Synplify Premier placement-aware logic synthesis technology that further boosts timing performance.
Paul Owens, Senior CAE, Synplify Business Group, Synopsys
May 06, 2014
|Streamlining IP and Subsystem Prototyping with HAPS-DX|
In this webinar we will introduce the new HAPS Developer eXpress (HAPS-DX) solution for complex IP and subsystem prototyping to accelerate IP and subsystem bring-up and streamline IP to SoC integration.
Neil Songcuan, Senior Product Marketing Manager, Synopsys
Jan 29, 2014
|Debug and Bring-Up Automation for the HAPS-70 Series FPGA-Based Prototyping System|
This webcast explores debug and bring-up automation features unique to the next-generation FPGA-based prototyping system, the Synopsys HAPS-70 Series.
Nathan Henderson, Corporate Applications Engineering Manager, Synopsys
Sep 26, 2013