|Optimize DDR Memory Subsystem Efficiency With Synopsys Platform Architect|
A mobile device SoC subsystem case study how Platform Architect enables efficient design, performance analysis and optimization of multicore SoC architectures.
Patrick Sheridan, Senior Staff Product Marketing Manager, Synopsys; Tim Kogel, Solution Architect, Synopsys
May 05, 2015
|Performance Analysis and Optimization of ARM® CoreLink™ NIC-400 based Systems|
A case study demonstration of system-level performance analysis and optimization.
William Orme, Strategic Marketing Manager, Interconnect products, ARM; Patrick Sheridan, Senior Staff Product Marketing Manager, Synopsys; Tim Kogel, Solution Architect, Synopsys
May 20, 2014
|Optimize Your Micro-server SoC Architecture for Power and Performance|
In this session we will address the architecture design challenges associated with HW-SW partitioning.
Patrick Sheridan and Tim Kogel, Synopsys
Oct 10, 2013