|Oct 30, 2013||Synopsys Extends Performance Exploration Solution for ARM AMBA 4 Interconnect-based Multicore SoCs|
Platform Architect with New SystemC Model for ARM CoreLink NIC-400 Network Interconnect Enables Optimization of SoC Performance from among Thousands of Configurations
|Feb 11, 2013||Synopsys Signs Multiyear Collaboration Agreement with ARM for Early Software Development of ARMv8 Processors|
New Virtualizer Development Kits for ARMv8 Processors Enable Early Software Development Up To One Year in Advance of Silicon
|Oct 29, 2012||Platform Architect Performance Validation Flow with Discovery VIP|
The Performance Checker capability builds on Discovery VIP data integrity checking to track latencies across an AMBA 4 AXI4 or ACE™ interconnect. Metrics defined in Synopsys' Platform Architect™ during architecture exploration are passed to the Discovery VIP as constraints to ensure consistency of system-performance through the design flow.
|Feb 15, 2012||Synopsys and Arteris Enable Earlier Multicore SoC Architecture Optimization with Faster Turnaround Times|
Collaboration Delivers Realistic Multicore System Simulation Using Transaction-Level Models of FlexNoC Interconnect with Platform Architect
|Sep 29, 2011||ARM and Synopsys Sign ARM Cortex Processor Models Agreement|
Synopsys and ARM® announced a licensing agreement enabling Synopsys to distribute ARM's Fast Models and create models of ARM Cortex Series processors.
|Sep 29, 2011||First Industry-Wide Web Portal for Transaction-Level Model Access Welcomes Model Developers and Users |
Synopsys announced the launch of TLMCentral (link TLMCentral to www.tlmcentral.com, if possible) the first industry-wide web portal for developers and users of transaction-level model (TLM) technology. TLMCentral aggregates information about free and commercial system-level models of common system-on-chip (SoC) components from leading semiconductor IP vendors, tool providers, service companies and universities. TLMCentral is an open portal that will ease and accelerate the development of virtual prototypes across the industry. It is available at no cost to users and providers of transaction-level models.
|Feb 07, 2011||Synopsys Announces New Technology for Optimizing Multicore Systems|
Synopsys announced the broad availability of Platform Architect with Multicore Optimization Technology, a new solution for performance analysis and early definition of multicore system architectures in SystemC. Using Platform Architect with Multicore Optimization Technology, designers of SoCs, chipsets and systems can capture hardware/software performance models of multicore system architectures in the early concept phase for robust performance measurement and trade-off analysis, months prior to software availability.
|Mar 23, 2010||Synopsys completes the Acquisition of CoWare|
Synopsys has completed the acquisition of CoWare, Inc., a global supplier of software and services for electronic systems design. The acquisition will expand Synopsys' portfolio of system-level design and verification products used in wireless, consumer and automotive design.
|Oct 21, 2009||CoWare and ARM Partner to Enable Rapid Configuration of AMBA NIC-301 Network Interconnect-based SoC Designs in SystemC|
New CoWare SBL-301 SystemC Bus Library for CoWare Platform Architect provides configurability, visibility and rapid turn-around time, enabling system designers to efficiently optimize AMBA NIC-301 network interconnect-based designs
|Apr 14, 2009||Fujitsu Develops Chip-Simulation Environment for Mobile Phones|
Fujitsu Laboratories Limited and Fujitsu Limited today announced the development of a simulation environment for modeling logic system-on-chips (SoCs) used in mobile phones, that will enable for the first time ever, high-precision assessment of system performance